EZ80F91MCU Datasheet, PDF (65/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
46
Table 3. Register Map (Continued)
Address
(hex) Mnemonic
Name
Reset
CPU Page
(hex) Access #
Universal Asynchronous Receiver/Transmitter 0 (UART0), continued
00C1 UART0_IER
UART 0 Interrupt Enable Register
00
UART0_BRG_H
UART 0 Baud Rate Generator
00
Register—High Byte
00C2 UART0_IIR
UART 0 Interrupt Identification
01
Register
UART0_FCTL
UART 0 FIFO Control Register
00
00C3 UART0_LCTL
UART 0 Line Control Register
00
00C4 UART0_MCTL
UART 0 Modem Control Register
00
00C5 UART0_LSR
UART 0 Line Status Register
60
00C6 UART0_MSR
UART 0 Modem Status Register
XX
R/W 192
R/W 190
R
193
W
195
R/W 196
R/W 198
R
200
R
202
00C7 UART0_SPR
UART 0 Scratch Pad Register
00
R/W 203
I²C
00C8
00C9
00CA
00CB
00CC
00CD
I2C_SAR
I2C_XSAR
I2C_DR
I2C_CTL
I2C_SR
I2C_CCR
I2C_SRR
I²C Slave Address Register
00
I²C Extended Slave Address Register
00
I²C Data Register
00
I²C Control Register
00
I²C Status Register
F8
I²C Clock Control Register
00
I²C Software Reset Register
XX
R/W 232
R/W 233
R/W 233
R/W 235
R
236
W
238
W
239
Notes:
1. After an external pin reset, the Watch-Dog Timer Control register is reset to 00h. After a Watch-Dog Timer time-
out reset, the Watch-Dog Timer Control register is reset to 20h.
2. When the CPU reads this register, the current sampled value of the port is read.
3. Read Only if RTC is locked; Read/Write if RTC is unlocked.
4. After an external pin reset or a Watch-Dog Timer reset, the RTC Control register is reset to x0xxxx00b. After a
an RTC Alarm sleep-mode recovery reset, the RTC Control register is reset to x0xxxx10b.
5. Read Only if Flash Memory is locked. Read/Write if Flash Memory is unlocked.
PS019209-0504
PRELIMINARY
Register Map