EZ80F91MCU Datasheet, PDF (287/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
268
EMAC PHY Unit Select Address Register
The EMAC PHY Unit Select Address Register allows the selection of multiple con-
nected external PHY devices. See Table 158.
Table 158. EMAC PHY Unit Select Address Register
(EMAC_FIAD = 003Fh)
Bit
7
6
Reset
0
0
CPU Access
R
R
Note: R = Read Only; R/W = Read/Write.
5
4
3
2
1
0
0
0
0
0
0
0
R R/W R/W R/W R/W R/W
Bit
Position
[7:5]
[4:0]
FIAD
Value
000
00h–
1Fh
Description
Reserved.
Programmable 5-bit value that selects an external PHY.
EMAC Transmit Polling Timer Register
This register sets the Transmit Polling Period in increments of TPTMR =
SYSCLK ÷ 256. Whenever this register is written, the status of the Transmit Buffer
Descriptor is checked to determine if the EMAC owns the Transmit buffer. It then
rechecks this status every TPTMR (calculated by TPTMR * EMAC_PTMR[7:0]).
The Transmit Polling Timer is disabled if this register is set to 00h (which also dis-
ables the transmitting of packets). If a transmission is in progress when
EMAC_PTMR is set to 00h, the transmission will complete. See Table 159.
Table 159. EMAC Transmit Polling Timer Register
(EMAC_PTMR = 0040h)
Bit
Reset
CPU Access
Note: R/W = Read/Write.
7
0
R/W
6
0
R/W
5
0
R/W
4
0
R/W
3
0
R/W
2
0
R/W
1
0
R/W
0
0
R/W
Bit
Position
[7:0]
EMAC_PTMR
Value
00h–
FFh
Description
The Transmit polling period.
PS019209-0504
PRELIMINARY
Ethernet Media Access Controller