EZ80F91MCU Datasheet, PDF (395/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
376
pulse reject period 347
Reset 52
Voltage Threshold 347
Voltage Controlled Oscillator 321, 328
PLL 321
voltage signal, high 108
voltage, input 321
voltage, peak-to-peak 329
voltage, supply 2, 59, 219, 322, 345, 346
W
WAIT 1, 14, 83, 86, 89–90, 120
WAIT Input Signal 77
WAIT pin, external 79
Wait State Timing for Read Operations 355
Wait State Timing for Write Operations 356
WAIT states 66, 76, 80, 87, 83, 86, 95, 294,
355–356
Watch-Dog Timer 1, 51, 54, 122–124, 293
clock source 122–123, 125
Control Register 35, 124
Operation 123
oscillator 124
Overview 122
Registers 124
Reset Register 126
time-out 51, 54–55, 122–126
time-out reset 35
WCOL—see Write Collision
WDT—see Watch-Dog Timer
WP—see Write Protect pin
WR—see Write instruction
Write Collision 212–213, 217
SPI 217
Write instruction 13–14, 74, 76, 79, 83, 86,
351, 354
Write Protect pin 33, 105, 115, 117
X
X_IN input pin 342
X_OUT output pin 342
Z
Z80 Bus Mode 79
ZCL—see ZiLOG Debug Interface Clock
ZDA—see ZiLOG Debug Interface Data
ZDI—see ZiLOG Debug Interface
ZDI_BUS_STAT 294, 296, 309
ZDI_BUSACK_EN 293, 309
ZDI-Supported Protocol 287
ZDS II—see ZiLOG Developer Studio II
ZiLOG Debug Interface 286–287, 311
Address Match Registers 296
Block Read 292
Block Write 291
Break Control Register 297
Bus Control Register 302
Bus Status Register 309
Clock 288, 291, 297
lock and Data Conventions 288
clock pin 288
Data 288, 297, 312
data pin 288
debug control 311
Master Control Register 299
Read Memory Register 309
Read Operations 292
Read Register Low, High, and Upper 308
Read/Write Control Register 300
Read-Only Registers 295
Register Addressing 290
Register Definitions 296
Single-Bit Byte Separator 289
Single-Byte Read 292
Single-Byte Write 291
Start Condition 288
Status Register 307
Write Data Registers 300
Write Memory Register 304
Write Only Registers 294
Write Operations 291
ZiLOG Developer Studio II 286
PS019209-0504
PRELIMINARY
Index