EZ80F91MCU Datasheet, PDF (303/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
284
EMAC FIFO Data Register—Low and High Bytes
The FIFO Read/Write Test Access Data Register allows writing and reading the
FIFO selected by the EMAC_TEST TxRx_SEL bit when the EMAC_TEST register
TEST_FIFO bit is set. See Tables 182 and 183.
Table 182. EMAC FIFO Data Register—Low Byte
(EMAC_FDATA_L = 0057h)
Bit
Reset
CPU Access
Note: R/W = Read/Write.
7
X
R/W
6
X
R/W
5
X
R/W
4
X
R/W
3
X
R/W
2
X
R/W
1
X
R/W
0
X
R/W
Bit
Position
Value
[7:0]
00h–
EMAC_FDATA_L FFh
Description
These bits represent the Low byte of the 10-bit EMAC
FIFO data value, {EMAC_FDATA_H[1:0],
EMAC_FDATA_L}. Bit 7 is bit 7 of the 16-bit value. Bit 0 is
bit 0 (lsb) of the 10-bit value.
Table 183. EMAC FIFO Data Register—High Byte
(EMAC_FDATA_H = 0058h)
Bit
7
6
5
4
3
2
1
0
Reset
0
0
0
0
0
0
X
X
CPU Access
R
R
R
R
R
R R/W R/W
Note: R = Read Only; R/W = Read/Write.
Bit
Position
Value
[7:2]
00h
[1:0]
0h–3h
EMAC_FDATA_H
Description
Reserved.
These bits represent the upper two bits of the 10-bit
EMAC FIFO data value, {EMAC_FDATA_H[1:0],
EMAC_FDATA_L}. Bit 1 is bit 9 (msb) of the 16-bit value.
Bit 0 is bit 8 of the 10-bit value.
PS019209-0504
PRELIMINARY
Ethernet Media Access Controller