EZ80F91MCU Datasheet, PDF (295/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
276
Table 171. EMAC Interrupt Enable Register
(EMAC_IEN = 004Ch)
Bit
Reset
CPU Access
Note: R/W = Read/Write.
7
0
R/W
6
0
R/W
5
0
R/W
4
0
R/W
3
0
R/W
2
0
R/W
1
0
R/W
0
0
R/W
Bit
Position
Value
7
1
TxFSMERR
0
6
1
MGTDONE ₀
5
1
Rx_CF
0
4
1
Rx_PCF
0
3
1
Rx_DONE ₀
2
1
Rx_OVR
0
1
1
Tx_CF
0
0
1
Tx_DONE ₀
Description
Enable Transmit State Machine Error Interrupt (system
interrupt).
Disable Transmit State Machine Error Interrupt (system
interrupt).
Enable MII Mgmt. Done Interrupt (system Interrupt).
Disable MII Mgmt. Done Interrupt (system Interrupt).
Enable Receive Control Frame Interrupt (Receive interrupt).
Disable Receive Control Frame Interrupt (Receive interrupt).
Enable Receive Pause Control Frame interrupt (Receive
interrupt).
Disable Receive Pause Control Frame interrupt (Receive
interrupt).
Enable Receive Done interrupt (Receive interrupt).
Disable Receive Done interrupt (Receive interrupt).
Enable Receive Overrun interrupt (System interrupt).
Disable Receive Overrun interrupt (System interrupt).
Enable Transmit Control Frame Interrupt (Transmit interrupt).
Disable Transmit Control Frame Interrupt (Transmit interrupt).
Enable Transmit Done interrupt (Transmit interrupt).
Disable Transmit Done Interrupt (Transmit interrupt).
PS019209-0504
PRELIMINARY
Ethernet Media Access Controller