EZ80F91MCU Datasheet, PDF (385/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
366
DATA6 13
DATA7 13
DC Characteristics 346
DCD—see Data Carrier Detect
DCD0 19, 206
DCD1 22
DCTS—see Clear To Send, Delta Status
Change Of
DDCD—see Data Carrier Detect, Delta Status
Change Of
DDSR—see Data Set Ready, Delta Status
Change Of
Divider, PLL 321
divisor count 215
16-bit 189
Document Information 363
Document Number Description 363
DSR—see Data Set Ready
DSR0 19, 206
DSR1 22
DTACK—see cycle termination signal
DTR—see Data Terminal Ready
DTR0 18, 206
DTR1 22
E
EC0 23, 133, 136, 138
EC1 30, 133, 135, 138
edge-selectable interrupts 62
Edge-Triggered Interrupts 60, 62
Electrical Characteristics 345
EMAC—see Ethernet Media Access Controller
EMACMII module 240
Enabling and Disabling the WDT 123
encoder/decoder 204–205, 207–208
signal pins 206
IrDA 56
endec—see encoder/decoder
ENDEC Mode 254, 258
Erasing Flash Memory 109
Ethernet Media Access Controller 240
Address Filter Register 263
Boundary Pointer Register—Low and High
Bytes 271
Boundary Pointer Register—Upper Byte
272
Buffer Size Register 274
Configuration Register 1 251
Configuration Register 2 253
Configuration Register 3 254
Configuration Register 4 255
FIFO Data Register—Low and High Bytes
284
FIFO Flags Register 285
Functional Description 241
functions 240
Hash Table Register 264
Interpacket Gap 258
Interpacket Gap Register 259
Interrupt Enable Register 275
Interrupt Status Register 277
Interrupts 244
Maximum Frame Length Register—Low
and High Bytes 261
memory 241, 242
MII Management Register 265
MII Status Register 279
Non-Back-To-Back IPG Register—Part 1
260
Non-Back-To-Back IPG Register—Part 2
261
PHY Address Register 267
PHY Configuration Data Register—High
Byte 267
PHY Configuration Data Register—Low
Byte 266
PHY Read Status Data Register—Low and
High Bytes 278
PHY Unit Select Address Register 268
RAM 101–104
Receive Blocks Left Register—Low and
High Bytes 282
Receive High Boundary Pointer Register—
Low and High Bytes 272
Receive Read Pointer Register—Low and
High Bytes 273
PS019209-0504
PRELIMINARY
Index