EZ80F91MCU Datasheet, PDF (275/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
256
EMAC Station Address Register
The EMAC Station Address register is used for two functions. In the address rec-
ognition logic for Receive frames, EMAC_STAD_0–EMAC_STAD_5 are matched
against the 6-byte Destination Address (DA) field of the Receive frame.
EMAC_STAD_0 is matched against the first byte of the Receive frame, and
EMAC_STAD_5 is matched against the sixth byte of the Receive frame. Bit 0 of
EMAC_STAD_0 (STAD[40]) is matched against the first bit (Unicast/Multicast bit)
of the first byte of the Receive frame. This bit ordering is used to logically map the
PE-MACMII station address, as exemplified below.
EMAC_STAD0[7:0] contains STAD[47:40]
•
•
EMAC_STAD5[7:0] contains STAD[7:0]
The second function of the EMAC Station Address registers is to provide the
Source Address (SA) field of Transmit Pause frames when these frames are
transmitted by the EMAC. EMAC_STAD_0 provides the first byte of the 6-byte SA
field and EMAC_STAD_5 provides the final byte of the SA field in order of trans-
mission. The LSB is the first byte sent out. The EMAC Station Address register is
detailed in Table 142.
Table 142. EMAC Station Address Register
(EMAC_STAD_0 = 0025h, EMAC_STAD_1 = 0026h, EMAC_STAD_2 = 0027h,
EMAC_STAD_3 = 0028h, EMAC_STAD_4 = 0029h, EMAC_STAD_5 = 002Ah)
Bit
EMAC_STAD_0 Reset
EMAC_STAD_1 Reset
EMAC_STAD_2 Reset
EMAC_STAD_3 Reset
EMAC_STAD_4 Reset
EMAC_STAD_5 Reset
CPU Access
Note: R/W = Read/Write.
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W R/W R/W R/W R/W R/W R/W R/W
Bit
Position
Value
[7:0]
00h–
EMAC_STAD_x FFh
Description
This 48-bit station address comprises {EMAC_STAD_5,
EMAC_STAD_4, EMAC_STAD_3, EMAC_STAD_2,
EMAC_STAD_1, EMAC_STAD_0}.
PS019209-0504
PRELIMINARY
Ethernet Media Access Controller