EZ80F91MCU Datasheet, PDF (202/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
183
Universal Asynchronous Receiver/
Transmitter
The UART module implements all of the logic required to support the asynchro-
nous communications protocol. The module also implements two separate 16-
byte-deep FIFOs for both transmission and reception. A block diagram of the
UART is illustrated in Figure 35.
System Clock
I/O Address
Data
Interrupt Signal
Receive
Buffer
Transmit
Buffer
Modem
Control
Logic
RxD0/RxD1
TxD0/TxD1
CTS0/CTS1
RTS0/RTS1
DSR0/DSR1
DTR0/DTR1
DCD0/DCD1
RI0/RI1
Figure 35. UART Block Diagram
The UART module provides the following asynchronous communications proto-
col-related features and functions:
• 5-, 6-, 7-, 8- or 9-bit data transmission
• Even/odd, space/mark, address/data, or no parity bit generation and detection
• Start and stop bit generation and detection (supports up to two stop bits)
• Line break detection and generation
• Receiver overrun and framing errors detection
• Logic and associated I/O to provide modem handshake capability
PS019209-0504
P R E L I M I N A R Y Universal Asynchronous Receiver/Transmitter