EZ80F91MCU Datasheet, PDF (62/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
43
Table 3. Register Map (Continued)
Address
(hex) Mnemonic
Name
Reset
CPU Page
(hex) Access #
Timers and PWM, continued
0087 PWM1F_H
PWM 1 Falling-Edge Register—High
XX
Byte
TMR3_OC2_H
Timer 3 Output Compare 2 Value
XX
Register—High Byte
0088 PWM2F_L
PWM 2 Falling-Edge Register—Low
XX
Byte
TMR3_OC3_L
Timer 3 Output Compare 3 Value
XX
Register—Low Byte
0089 PWM2F_H
PWM 2 Falling-Edge Register—High
XX
Byte
TMR3_OC3_H
Timer 3 Output Compare 3 Value
XX
Register—High Byte
008A PWM3F_L
PWM 3 Falling-Edge Register—Low
XX
Byte
008B PWM3F_H
PWM 3 Falling-Edge Register—High
XX
Byte
R/W 165
R/W 150
R/W 164
R/W 149
R/W 165
R/W 150
R/W 164
R/W 165
Watch-Dog Timer
0093 WDT_CTL
0094 WDT_RR
Watch-Dog Timer Control Register
Watch-Dog Timer Reset Register
00/20¹
R/W
124
XX
W
126
General-Purpose Input/Output Ports
0096 PA_DR
Port A Data Register
XX
R/W²
63
0097 PA_DDR
Port A Data Direction Register
FF
R/W
63
0098 PA_ALT1
Port A Alternate Register 1
00
R/W
63
0099
009A
PA_ALT2
PB_DR
Port A Alternate Register 2
Port B Data Register
00
R/W
64
XX
R/W²
63
Notes:
1. After an external pin reset, the Watch-Dog Timer Control register is reset to 00h. After a Watch-Dog Timer time-
out reset, the Watch-Dog Timer Control register is reset to 20h.
2. When the CPU reads this register, the current sampled value of the port is read.
3. Read Only if RTC is locked; Read/Write if RTC is unlocked.
4. After an external pin reset or a Watch-Dog Timer reset, the RTC Control register is reset to x0xxxx00b. After a
an RTC Alarm sleep-mode recovery reset, the RTC Control register is reset to x0xxxx10b.
5. Read Only if Flash Memory is locked. Read/Write if Flash Memory is unlocked.
PS019209-0504
PRELIMINARY
Register Map