EZ80F91MCU Datasheet, PDF (180/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
161
Pulse-Width Modulation Control Register 3
The PWM Control Register 3, detailed in Table 75, is used to configure the PWM
power trip functionality.
Table 75. PWM Control Register 3
(PWM_CTL3 = 007Bh)
Bit
7
6
5
4
3
2
1
0
Reset
0
0
0
0
0
0
0
0
CPU Access
R/W R/W R/W R/W R/W R/W R/W R
Note: R/W = Read/Write; R = Read only;
Bit
Position
Value
7
0
PT_IC3_EN ₁
6
0
PT_IC2_EN ₁
5
0
PT_IC1_EN ₁
4
0
PT_IC0_EN ₁
3
0
PT_TRI
1
2
0
PT_LVL
1
1
0
PT_LVL_N ₁
0
0
PTD
1
Description
Power trip disabled on IC3.
Power trip enabled on IC3.
Power trip disabled on IC2.
Power trip enabled on IC2.
Power trip disabled on IC1.
Power trip enabled on IC1.
Power trip disabled on IC0.
Power trip enabled on IC0.
All PWM trip levels are tristate
All PWM trip levels are defined by PT_LVL and PT_LVL_N
After power trip, PWMx outputs are set to one.
After power trip, PWMx outputs are set to zero.
After power trip, PWMx outputs are set to one.
After power trip, PWMx outputs are set to zero.
Power trip has been cleared.
This bit is set after power trip event.
PS019209-0504
PRELIMINARY
Programmable Reload Timers