EZ80F91MCU Datasheet, PDF (120/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
101
Random Access Memory
The eZ80F91 device features 8 KB (8192 bytes) of single-port data Random
Access Memory (RAM) for general-purpose use and 8 KB of RAM for the Ethernet
MAC. RAM can be enabled or disabled, and it can be relocated to the top of any
64 KB page in memory. Data is passed to and from RAM via the 8-bit data bus.
On-chip RAM operates with zero wait states. EMAC RAM is accessed via the bus
arbiter and can execute with zero or one wait states.
General-purpose RAM occupies memory addresses in the RAM Address Upper
Byte register, in the range {RAM_ADDR_U[7:0], E000h} to {RAM_ADDR_U[7:0],
FFFFh}. EMAC RAM occupies memory addresses in the range
{RAM_ADDR_U[7:0], C000h} to {RAM_ADDR_U[7:0], DFFFh}. Following a
RESET, RAM is enabled when RAM_ADDR_U is set to FFh. Figure 21 illustrates
a memory map for on-chip RAM. In this example, RAM_ADDR_U is set to 7Ah.
Figure 21 is not drawn to scale, as RAM occupies only a very small fraction of the
available 16 MB address space.
Memory
Location
FFFFFFh
7AFFFFh
7AE000h
7ADFFFh
7AC000h
8 KB
General-Purpose
RAM
8 KB
EMAC SRAM
RAM_ADDR_U
7Ah
000000h
Figure 21. Example: eZ80F91 On-Chip RAM Memory Addressing
When enabled, on-chip RAM assumes priority over on-chip Flash Memory and
any Memory Chip Selects that can also be enabled in the same address space. If
an address is generated in a range that is covered by both the RAM address
PS019209-0504
PRELIMINARY
Random Access Memory