EZ80F91MCU Datasheet, PDF (308/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
289
ZDI Data In
(Write)
ZDI Data In
(Write)
ZCL
ZDA
Start Signal
Figure 53. ZDI Write Timing
ZDI Data Out
(Read)
ZDI Data Out
(Read)
ZCL
ZDA
Start Signal
Figure 54. ZDI Read Timing
ZDI Single-Bit Byte Separator
Following each 8-bit ZDI data transfer, a single-bit byte separator is used. To ini-
tiate a new ZDI command, the single-bit byte separator must be High (logical 1) to
allow for a new ZDI START command to be sent. For all other cases, the single-bit
byte separator can be either Low (logical 0) or High (logical 1). When ZDI is con-
figured to allow the CPU to accept external bus requests, the single-bit byte sepa-
rator should be Low (logical 0) during all ZDI commands. This Low value indicates
that ZDI is still operating and is not ready to relinquish the bus. The CPU does not
accept the external bus requests until the single-bit byte separator is a High (logi-
PS019209-0504
PRELIMINARY
ZiLOG Debug Interface