EZ80F91MCU Datasheet, PDF (36/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
17
Table 2. Pin Identification on the eZ80F91 Device (Continued)
LQFP BGA
Pin # Pin#
73 M12
Symbol
PD0
Function
Signal Direction
GPIO Port D Bidirectional
TxD0
UART
Output
Transmit Data
IR_TxD
IrDA Transmit Output
Data
74 L12 PD1
GPIO Port D Bidirectional
RxD0
Receive Data Input
IR_RxD
IrDA Receive Input
Data
Note: *PHY represents the physical layer of the OSI model.
Description
This pin can be used for general-
purpose I/O. It can be individually
programmed as input or output
and can also be used individually
as an interrupt input. Each Port D
pin, when programmed as output,
can be selected to be an open-
drain or open-source output. Port
D is multiplexed with one UART.
This pin is used by the UART to
transmit asynchronous serial
data. This signal is multiplexed
with PD0.
This pin is used by the IrDA
encoder/decoder to transmit
serial data. This signal is
multiplexed with PD0.
This pin can be used for general-
purpose I/O. It can be individually
programmed as input or output
and can also be used individually
as an interrupt input. Each Port D
pin, when programmed as output,
can be selected to be an open-
drain or open-source output. Port
D is multiplexed with one UART.
This pin is used by the UART to
receive asynchronous serial data.
This signal is multiplexed with
PD1.
This pin is used by the IrDA
encoder/decoder to receive serial
data. This signal is multiplexed
with PD1.
PS019209-0504
PRELIMINARY
Architectural Overview