EZ80F91MCU Datasheet, PDF (20/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
1
Architectural Overview
The eZ80F91 device is a member of ZiLOG’s family of eZ80Acclaim!^™ Flash
Microcontrollers. The eZ80F91 is a high-speed single-cycle instruction-fetch
microcontroller with a maximum clock speed of 50 MHz. It can operate in Z80-
compatible addressing mode (64 KB) or full 24-bit addressing mode (16 MB). The
rich peripheral set of the eZ80F91 makes it suitable for a variety of applications,
including industrial control, embedded communication, and point-of-sale termi-
nals.
Features
• Single-cycle instruction fetch, high-performance, pipelined eZ80^® CPU core¹
• 10/100 BaseT Ethernet Media Access Controller with Media-Independent
Interface (MII)
• 256KB Flash memory and 16 KB SRAM (8KB user, 8 KB EMAC)
• Low power features including SLEEP mode, HALT mode, and selective
peripheral power-down control
• Two UARTs with independent baud rate generators
• SPI with independent clock rate generator
• I²C with independent clock rate generator
• IrDA-compliant infrared encoder/decoder
• Glueless external peripheral interface with 4 Chip Selects, individual Wait
State generators, and an external WAIT input pin—supports Z80-, Intel-, and
Motorola-style buses
• Fixed-priority vectored interrupts (both internal and external) and interrupt
controller
• Real-time clock with on-chip 32KHz oscillator, selectable 50/60Hz input, and
separate V_DD pin for battery backup
• Four 16-bit Counter/Timers with prescalers and direct input/output drive
• Watch-Dog Timer with internal oscillator clocking option
• 32 bits of General-Purpose I/O
• OCI™ and ZDI debug interfaces
1. For simplicity, the term eZ80^® CPU is referred to as CPU for the bulk of this
document.
PS019209-0504
PRELIMINARY
Architectural Overview