EZ80F91MCU Datasheet, PDF (292/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
273
Table 167. EMAC Receive High Boundary Pointer Register—High Byte
(EMAC_RHBP_H = 0048h)
Bit
7
6
Reset
1
1
CPU Access
R
R
Note: R = Read Only, R/W = Read/Write
5
4
3
2
1
0
0
0
0
0
R R/W R/W R/W R/W
0
0
R/W
Bit
Position
Value Description
[7:0]
00h–
EMAC_RHBP_H FFh
These bits represent the High byte of the 2-byte EMAC
Receive High Boundary Pointer value, {EMAC_RHBP_H,
EMAC_RHBP_L}. Bit 7 is bit 15 (msb) of the 16-bit value.
Bit 0 is bit 8 of the 16-bit value.
Note: *Bits 7:5 are not used by the EMAC; these bits return 000.
EMAC Receive Read Pointer Register—Low and High Bytes
The Receive Read Pointer Register should be initialized to the EMAC_BP value
(start of the Receive buffer). This register points to where the next Receive packet
is read from. The EMAC_BP[12:5] is loaded into this register whenever the
EMAC_RST [(HRRFN) is set to 1. The RxDMA block uses the Emac_Rrp[12:5] to
compare to EmacRwp[12:5] for determining how many buffers remain. The result
equates to the EmacBlksLeft register. See Tables 168 and 169.
Table 168. EMAC Receive Read Pointer Register—Low Byte
(EMAC_RRP_L = 0049h)
Bit
7
6
5
4
3
2
1
0
Reset
0
0
0
0
0
0
0
0
CPU Access
R/W R/W R/W R
R
R
R
R
Note: R = Read Only, R/W = Read/Write
Bit
Position
[7:0]
EMAC_RRP_L
Value
00h–
FFh
Description
These bits represent the Low byte of the 2-byte EMAC
Receive Read Pointer value, {EMAC_RRP_H,
EMAC_RRP_L}. Bit 7 is bit 7 of the 16-bit value. Bit 0 is bit
0 (lsb) of the 16-bit value.
PS019209-0504
PRELIMINARY
Ethernet Media Access Controller