EZ80F91MCU Datasheet, PDF (245/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
226
Table 119. I²C 10-Bit Master Transmit Status Codes
Code I²C State
Microcontroller Response Next I²C Action
38h
Arbitration lost
Clear IFLG
Return to idle
Or set STA, clear IFLG
Transmit START
when bus free
68h
Arbitration lost,
Clear IFLG, clear AAK = 0² Receive data byte,
SLA+W received,
ACK transmitted¹
Or clear IFLG, set AAK = 1
transmit NACK
Receive data byte,
transmit ACK
B0h
Arbitration lost,
Write byte to DATA,
Transmit last byte,
SLA+R received,
ACK transmitted³
clear IFLG, clear AAK = 0
Or write byte to DATA,
receive ACK
Transmit data byte,
clear IFLG, set AAK = 1
receive ACK
D0h
Second address byte Write byte to data,
+ W transmitted,
clear IFLG
ACK received
Or set STA, clear IFLG
Transmit data byte,
receive ACK
Transmit repeated
START
Or set STP, clear IFLG
Transmit STOP
Or set STA & STP,
clear IFLG
Transmit STOP
then
START
D8h
Second address byte Same as code D0h
+ W transmitted,
ACK not received
Same as code D0h
Notes:
1. W is defined as the Write bit; i.e., the lsb is cleared to 0.
2. AAK is an I²C control bit that identifies which ACK signal to transmit.
3. R is defined as the Read bit; i.e., the lsb is set to 1.
If a repeated START condition is transmitted, the status code is 10h instead of
08h.
After each data byte is transmitted, the IFLG is set to 1 and one of the status
codes listed in Table 120 is loaded into the I2C_SR register.
PS019209-0504
PRELIMINARY
I²C Serial I/O Interface