EZ80F91MCU Datasheet, PDF (34/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
15
Table 2. Pin Identification on the eZ80F91 Device (Continued)
LQFP BGA
Pin # Pin#
Symbol
Function
Signal Direction
Description
56 J6
NMI
Nonmaskable
Interrupt
Schmitt-trigger input, The NMI input is a higher priority
Active Low
input than the maskable
interrupts. It is always recognized
at the end of an instruction,
regardless of the state of the
interrupt enable control bits. This
input includes a Schmitt trigger to
allow RC rise times.
57 M7
BUSREQ
Bus Request
Schmitt-trigger input, External devices can request the
Active Low
eZ80F91 device to release the
memory interface bus for their
use, by driving this pin Low.
58 L7
BUSACK
Bus
Output, Active Low
Acknowledge
The eZ80F91 device responds to
a Low on BUSREQ, by tristating
the address, data, and control
signals, and by driving the
BUSACK line Low. During bus
acknowledge cycles ADDR[23:0],
IORQ, and MREQ are inputs.
59 K7
60 H6
61 M8
V_DD
V_SS
RTC_X_IN
Power Supply
Ground
Real-Time Input
Clock Crystal
Input
Power Supply.
Ground.
This pin is the input to the low-
power 32KHz crystal oscillator for
the Real-Time Clock.
62 L8
RTC_X_OUT Real-Time
Bidirectional
Clock Crystal
Output
This pin is the output from the
low-power 32KHz crystal
oscillator for the Real-Time Clock.
This pin is an input when the RTC
is configured to operate from 50/
60 Hz input clock signals and the
32 KHz crystal oscillator is
disabled.
Note: *PHY represents the physical layer of the OSI model.
PS019209-0504
PRELIMINARY
Architectural Overview