EZ80F91MCU Datasheet, PDF (183/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
164
Pulse-Width Modulation Falling Edge—Low Byte
A parallel 16-bit Write of {TMR3_PWMxF_H[7–0], TMR3_PWMxF_L[7–0]} occurs
when software initiates a Write to TMR3_PWMxF_L. The register is detailed in
Table 78.
Table 78. PWMx Falling-Edge Register—Low Byte
(TMR3_PWM0F_L = 0084h, TMR3_PWM1F_L = 0086h, TMR3_PWM2F_L = 0088h,
TMR3_PWM3F_L = 008Ah)
Bit
Reset
CPU Access
Note: R/W = Read/Write.
7
0
R/W
6
0
R/W
5
0
R/W
4
0
R/W
3
0
R/W
2
0
R/W
1
0
R/W
0
0
R/W
Bit
Position
[7:0]
PWMXF_L
Value Description
00h–FFh These bits represent the Low byte of the 16-bit value to set
the falling edge COMPARE value for PWMx,
{TMR3_PWMXF_H[7:0], TMR3_PWMXF_L[7:0]}. Bit 7 is bit 7
of the 16-bit timer data value. Bit 0 is bit 0 (lsb) of the 16-bit
timer data value.
PS019209-0504
PRELIMINARY
Programmable Reload Timers