EZ80F91MCU Datasheet, PDF (225/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
206
High (1) for the full 16-clock period. If the data to be received is a logical 0, a 3-
clock Low (0) pulse is output following a 7-clock High (1) period. Following the 3-
clock Low pulse is a 6-clock High pulse to complete the full 16-clock data period.
Data transmission is illustrated in Figure 38.
Baud Rate
Clock
IR_RxD
16-clock
period
Start Bit = 0 Data Bit 0 = 1 Data Bit 1 = 0 Data Bit 2 = 1 Data Bit 3 = 1
1.6 µs
min. pulse
UART_RxD
8-clock
delay
16-clock
period
Figure 38. Infrared Data Reception
16-clock
period
16-clock
period
16-clock
period
Note: The infrared encoder/decoder samples the incoming IR pulses using the baud
rate clock divided by 16. This sampling rate can be insufficient to capture the
incoming pulses when they use a short pulse (1.6 µs) format and low data rates.
When the external transmitter sends a short pulse of 3 clocks of 16 clock periods
(IR_RxD), the infrared encoder/decoder receives the data properly.
Jitter
Due to the inherent sampling of the received IR_RxD signal by the Bit Rate Clock,
some jitter can be expected on the first bit in any sequence of data. However, all
subsequent bits in the received data stream are a fixed 16 clock periods wide.
Infrared Encoder/Decoder Signal Pins
The endec signal pins, IR_TxD and IR_RxD, are multiplexed with General-Pur-
pose I/O (GPIO) pins. These GPIO pins must be configured for alternate function
operation for the endec to operate.
The remaining six UART0 pins, CTS0, DCD0, DSR0, DTR0, RTS and RI0, are not
required for use with the endec. The UART0 modem status interrupt should be
disabled to prevent unwanted interrupts from these pins. The GPIO pins corre-
sponding to these six unused UART0 pins can be used for inputs, outputs, or
PS019209-0504
PRELIMINARY
Infrared Encoder/Decoder