EZ80F91MCU Datasheet, PDF (139/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
120
Flash Column Select Register
The Flash Column Select Register is an 8-bit value used to define one of the 256
bytes of Flash memory contained in a single row. This register is used for all I/O
access to Flash memory. In addition, each access to the FLASH_DATA register
causes an autoincrement of the Flash address stored in the Flash Address regis-
ters (FLASH_PAGE, FLASH_ROW, FLASH_COL). See Table 44.
Table 44. Flash Column Select Register
(FLASH_COL = 00FEh)
Bit
7
6
Reset
0
0
CPU Access
R/W R/W
Note: R/W = Read/Write, R = Read Only.
5
0
R/W
4
0
R/W
3
0
R/W
2
0
R/W
1
0
R/W
0
0
R/W
Bit
Position
[7:0]
FLASH_COL
Value Description
00h– Column address of Flash memory to be used during an I/O
FFh access of Flash memory.
Flash Program Control Register
The Flash Program Control Register is used to perform the functions of MASS
ERASE, PAGE ERASE, and ROW PROGRAM.
MASS ERASE and PAGE ERASE are self-clearing functions. MASS ERASE
requires approximately 200 ms to erase the full 256 KB of main Flash and the 512-
byte information page. PAGE ERASE requires approximately 10 ms to erase a
2 KB page. Upon completion of either a MASS ERASE or PAGE ERASE, the
value of each corresponding bit is reset to 0.
While Flash is being erased, any Read or Write access to Flash forces the CPU
into a wait state until the Erase operation is complete and the Flash can be
accessed. Reads and Writes to areas other than Flash memory can proceed as
usual while an Erase operation is underway.
During row programming, any reads of Flash memory force a WAIT condition until
the row programming operation completes or times out. See Table 45.
PS019209-0504
PRELIMINARY
Flash Memory