EZ80F91MCU Datasheet, PDF (272/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
253
EMAC Configuration Register 2
The EMAC Configuration Register 2 controls the behavior of the back pressure
and late collision data from the Descriptor table. See Table 139.
Table 139. EMAC Configuration Register 2
(EMAC_CFG2 = 0022h)
Bit
Reset
CPU Access
Note: R/W = Read/Write.
7
0
R/W
6
0
R/W
5
1
R/W
4
1
R/W
3
0
R/W
2
1
R/W
1
1
R/W
0
1
R/W
Bit
Position
7
BPNB
6
NOBO
[5:0]
LCOL
Value
0
1
0
1
00h–
3Fh
Description
Use normal back-off algorithm prior to transmitting packet. No
back pressure applied.
After incidentally causing a collision during back pressure, the
EMAC immediately (i.e., no back-off) retransmits the packet
without back-off, which reduces the chance of further
collisions and ensures that the Transmit packets are sent.
Enable exponential back-off.
The EMAC immediately retransmits following a collision rather
than use the binary exponential backfill algorithm, as specified
in the IEEE 802.3 specification.
Sets the number of bytes after Start Frame Delimiter (SFD)
for which a late collision can occur. By default, all late
collisions are aborted.
PS019209-0504
PRELIMINARY
Ethernet Media Access Controller