EZ80F91MCU Datasheet, PDF (122/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
103
RAM Address Upper Byte Register
The RAM_ADDR_U register defines the upper byte of the address for on-chip
RAM. If enabled, RAM addresses assume priority over all Chip Selects. The
external Chip Select signals are not asserted if the corresponding RAM address is
enabled. See Table 32.
Table 32. RAM Address Upper Byte Register
(RAM_ADDR_U = 00B5h)
Bit
Reset
CPU Access
Note: R/W = Read/Write.
7
1
R/W
6
1
R/W
5
1
R/W
4
1
R/W
3
1
R/W
2
1
R/W
1
1
R/W
0
1
R/W
Bit
Position
Value Description
[7:0]
00h–
RAM_ADDR_U FFh
This byte defines the upper byte of the RAM address. When
enabled, the general-purpose RAM address space ranges
from {RAM_ADDR_U, E000h} to {RAM_ADDR_U, FFFFh}.
When enabled, the EMAC RAM address space ranges from
{RAM_ADDR_U, C000h} to {RAM_ADDR_U, DFFFh}.
PS019209-0504
PRELIMINARY
Random Access Memory