EZ80F91MCU Datasheet, PDF (273/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
254
EMAC Configuration Register 3
The EMAC Configuration Register 3 controls preamble length and value, exces-
sive deferment, and the number of retransmission tries. See Table 140.
Table 140. EMAC Configuration Register 3
(EMAC_CFG3 = 0023h)
Bit
Reset
CPU Access
Note: R/W = Read/Write.
7
0
R/W
6
0
R/W
5
0
R/W
4
0
R/W
3
1
R/W
2
1
R/W
1
1
R/W
0
1
R/W
Bit
Position
7
LONGP
6
PUREP
5
XSDFR
4
BITMD
[3:0]
RETRY
Value
0
1
0
1
0
1
0
1
0h–Fh
Description
The EMAC allows any preamble length as per the IEEE 802.3
specification.
The EMAC only allows Receive packets that contain
preamble fields less than 12 bytes in length.
No preamble error checking is performed.
The EMAC verifies the content of the preamble to ensure that
it contains a value of 55h and that it is error-free. Packets
containing an errored preamble are discarded.
The EMAC aborts when the excessive deferral limit is
reached.
The EMAC defers to the carrier indefinitely as per the IEEE
802.3 specification.
Disable 10 Mbps ENDEC mode.
Enable 10 Mbps ENDEC mode.
A programmable field specifying the number of retransmission
attempts following a collision before aborting the packet due
to excessive collisions.
PS019209-0504
PRELIMINARY
Ethernet Media Access Controller