EZ80F91MCU Datasheet, PDF (288/396 Pages) Zilog, Inc. – eZ80Acclaim-TM Flash Microcontrollers

eZ80F91 MCU
Product Specification
269
EMAC Reset Control Register
The bit values in the EMAC Reset Control Register are not self-clearing bits. The
user is responsible for controlling their state. See Table 160.
Table 160. EMAC Reset Control Register
(EMAC_RST = 0041h)
Bit
7
6
Reset
0
0
CPU Access
R
R
Note: R = Read Only; R/W = Read/Write.
5
4
3
2
1
0
1
0
0
0
0
0
R/W R/W R/W R/W R/W R/W
Bit
Position
[7:6]
5
SRST
4
HRTFN
3
HRRFN
2
HRTMC
1
HRRMC
0
HRMGT
Value
00
1
0
1
0
1
0
1
0
1
0
1
0
Description
Reserved.
Software Reset Active—resets Receive, Transmit, EMAC
Control and EMAC MII_MGT functions.
Normal operation.
Reset Transmit function.
Normal operation.
Reset Receive function.
Normal operation.
Reset EMAC Transmit Control function.
Normal operation.
Reset EMAC Receive Control function.
Normal operation.
Reset EMAC Management function.
Normal operation.
PS019209-0504
PRELIMINARY
Ethernet Media Access Controller