DRA722_17 Datasheet, PDF (80/408 Pages) Texas Instruments – Infotainment Applications Processor

DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
ADDRESS REGISTER NAME
BALL
NUMBER
0x15A0
0x15A4
0x15A8
0x15AC
0x15B0
0x15B4
0x15B8
0x15BC
0x15C0
0x15C4
0x15C8
0x15CC
0x15D0
0x15D4
0x15D8
0x15DC
0x15E0
0x15E4
0x15E8
0x15EC
0x15F0
0x15F4
0x15F8
0x15FC
CTRL_CORE_PAD_V C3
IN2A_D14
CTRL_CORE_PAD_V C4
IN2A_D15
CTRL_CORE_PAD_V B2
IN2A_D16
CTRL_CORE_PAD_V D6
IN2A_D17
CTRL_CORE_PAD_V C5
IN2A_D18
CTRL_CORE_PAD_V A3
IN2A_D19
CTRL_CORE_PAD_V B3
IN2A_D20
CTRL_CORE_PAD_V B4
IN2A_D21
CTRL_CORE_PAD_V B5
IN2A_D22
CTRL_CORE_PAD_V A4
IN2A_D23
CTRL_CORE_PAD_V D11
OUT1_CLK
CTRL_CORE_PAD_V B10
OUT1_DE
CTRL_CORE_PAD_V B11
OUT1_FLD
CTRL_CORE_PAD_V C11
OUT1_HSYNC
CTRL_CORE_PAD_V E11
OUT1_VSYNC
CTRL_CORE_PAD_V F11
OUT1_D0
CTRL_CORE_PAD_V G10
OUT1_D1
CTRL_CORE_PAD_V F10
OUT1_D2
CTRL_CORE_PAD_V G11
OUT1_D3
CTRL_CORE_PAD_V E9
OUT1_D4
CTRL_CORE_PAD_V F9
OUT1_D5
CTRL_CORE_PAD_V F8
OUT1_D6
CTRL_CORE_PAD_V E7
OUT1_D7
CTRL_CORE_PAD_V E8
OUT1_D8
0
vin2a_d14
vin2a_d15
vin2a_d16
vin2a_d17
vin2a_d18
vin2a_d19
vin2a_d20
vin2a_d21
vin2a_d22
vin2a_d23
vout1_clk
vout1_de
vout1_fld
vout1_hsync
vout1_vsync
vout1_d0
vout1_d1
vout1_d2
vout1_d3
vout1_d4
vout1_d5
vout1_d6
vout1_d7
vout1_d8
80
Terminal Configuration and Functions
www.ti.com
Table 4-3. Multiplexing Characteristics (continued)
MUXMODE FIELD SETTINGS (CTRL_CORE_PAD_*[3:0])
1
2
3*
4*
5*
6*
7
8*
rgmii1_txd3 vout2_d9
mii1_txclk
rgmii1_txd2 vout2_d8
mii1_txd0
vin2b_d7
rgmii1_txd1 vout2_d7
mii1_txd1
vin2b_d6
rgmii1_txd0 vout2_d6
mii1_txd2
vin2b_d5
rgmii1_rxc vout2_d5
mii1_txd3
vin2b_d4
rgmii1_rxctl vout2_d4
mii1_txer
vin2b_d3
rgmii1_rxd3 vout2_d3
mii1_rxer
vin2b_d2
rgmii1_rxd2 vout2_d2
mii1_col
vin2b_d1
rgmii1_rxd1 vout2_d1
mii1_crs
vin2b_d0
rgmii1_rxd0 vout2_d0
mii1_txen
uart5_rxd
uart5_txd
emu2
emu5
emu6
emu7
emu8
emu9
uart6_rxd
vin2a_fld0
vin1a_fld0
vin1a_fld0
vin2a_de0
vin1a_de0
vin1a_de0
vin2a_clk0
vin1a_clk0
vin1a_clk0
vin2a_hsync0 vin1a_hsync0
vin1a_hsync0
vin2a_vsync0 vin1a_vsync0
vin1a_vsync0
vin2a_d16
vin1a_d16
vin1a_d16
vin2a_d17
vin1a_d17
vin1a_d17
vin2a_d18
vin1a_d18
vin1a_d18
obs0
vin2a_d19
vin1a_d19
vin1a_d19
obs1
vin2a_d20
vin1a_d20
vin1a_d20
obs2
vin2a_d21
vin1a_d21
vin1a_d21
obs3
vin2a_d22
vin1a_d22
vin1a_d22
obs4
vin2a_d23
vin1a_d23
vin1a_d23
vin2a_d8
vin1a_d8
vin1a_d8
spi3_cs0
spi3_d1
spi3_cs1
spi3_d0
spi3_sclk
spi3_cs2
obs16
obs17
obs18
obs19
obs20
obs_irq1
obs_dmarq1
9
10
14*
15
eQEP3B_in gpio4_15
Driver off
eQEP3_index gpio4_16
Driver off
eQEP3_strob gpio4_24
e
ehrpwm3A gpio4_25
Driver off
Driver off
ehrpwm3B gpio4_26
Driver off
ehrpwm3_trip gpio4_27
zone_input
eCAP3_in_P gpio4_28
WM3_out
gpio4_29
Driver off
Driver off
Driver off
gpio4_30
Driver off
gpio4_31
Driver off
gpio4_19
Driver off
gpio4_20
Driver off
gpio4_21
Driver off
gpio4_22
Driver off
gpio4_23
Driver off
gpio8_0
Driver off
gpio8_1
Driver off
gpio8_2
Driver off
gpio8_3
Driver off
gpio8_4
Driver off
gpio8_5
Driver off
gpio8_6
Driver off
gpio8_7
Driver off
gpio8_8
Driver off
Submit Documentation Feedback
Product Folder Links: DRA722 DRA724 DRA725 DRA726
Copyright © 2016–2017, Texas Instruments Incorporated