DRA722_17 Datasheet, PDF (5/408 Pages) Texas Instruments – Infotainment Applications Processor

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DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
2 Revision History
Changes from August 1, 2016 to January 30, 2017 (from A Revision (July 2016) to B Revision)
Page
• Updated Features list ................................................................................................................ 1
• Updated DSIS Description for "blank" in Section 4.2........................................................................... 11
• Added a note regarding rstoutn in Table 4-30 ................................................................................. 119
• Changed GPMC 1 Load / 5 Load to Default Mode / Alternate Mode in Table 4-30 ...................................... 119
• Updated ESD Ratings table to include HDMI pins specifics ................................................................. 127
• Fixed typos and clean-up in Table 5-4.......................................................................................... 128
• Updated IQ1833 Buffers DC Electrical Characteristics Table ............................................................... 156
• Updated rstoutn timing in Figure 5-4 ............................................................................................ 164
• Added DSS_VIRTUAL1 and MMC2_VIRTUAL2 options to the Timing Chapter Section 7.............................. 190
• Changed GPMC 1 Load / 5 Load to Default Mode / Alternate Mode in Table 7-2........................................ 190
• Added new timing information for VIP, DSS VOUT, GPMC, McSPI, QSPI, McASP and Ethernet Interfaces ........ 192
• Added missing balls for vin1b in IOSET7 in Table 7-4 ....................................................................... 194
• Updated Manual Modes for VIP, DSS and MMC modules................................................................... 201
• Updated are Virtual Mode Case Details for McASP2 when AXR(Inputs)/CLKX/FSX in 80MHz and non-80MHz
operation. .......................................................................................................................... 270
• Fixed typo in naming of Figure 7-47 to Figure 7-50........................................................................... 277
• Removed 1149.7 (cJTAG) support from the DRA72x family of devices.................................................... 328
• Updated details for SMPS1 of the TPS65917 PMIC in Table 8-5........................................................... 346
• Updated capacitor value in diagram for PLL supply decoupling ............................................................ 356
• Updated symbolization in Printed Device Reference Figure 9-1 and Nomenclature Description Table 9-1........... 401
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Product Folder Links: DRA722 DRA724 DRA725 DRA726
Revision History
5