 English |
|
|
|
|
|
|
|
| DRA722_17 Datasheet, PDF (232/408 Pages) Texas Instruments – Infotainment Applications Processor | |||
| |||
| ◁ |
DRA722, DRA724, DRA725, DRA726
SPRS956B â MARCH 2016 â REVISED JANUARY 2017
www.ti.com
gpmc_clk
gpmc_csi
gpmc_a[27:1]
gpmc_ben1
gpmc_ben0
gpmc_advn_ale
gpmc_wen
gpmc_ad[15:0]
gpmc_waitj
gpio6_16.clkout1
F1
F1
F0
F2
F4
Address
F6
F6
F8 F8
F20
F14
F14
D0
F22
F3
F18
F17
F17
F17
F17
F17
F17
F9
F15 F15 F15
D1 D2
D3
F21
F23
F23
GPMC_06
Figure 7-12. GPMC / Nonmultiplexed 16bits NOR Flash - Synchronous Burst Write 4x16bits -
(GpmcFCLKDivider = 0)(1)(2)
(1) In âgpmc_csiâ, i = 1 to 7.
(2) In âgpmc_waitjâ, j = 0 to 1.
7.11.2 GPMC/NOR Flash Interface Asynchronous Timing
CAUTION
The I/O Timings provided in this section are valid only for some GPMC usage
modes when the corresponding Virtual I/O Timings or Manual I/O Timings are
configured as described in the tables found in this section.
Table 7-26 and Table 7-27 assume testing over the recommended operating conditions and electrical
characteristic conditions below (see Figure 7-13, Figure 7-14, Figure 7-15, Figure 7-16, Figure 7-17 and
Figure 7-18).
Table 7-26. GPMC/NOR Flash Interface Timing Requirements - Asynchronous Mode
NO. PARAMETER
DESCRIPTION
FA5 tacc(DAT)
Data Maximum Access Time (GPMC_FCLK cycles)
MIN
MAX
H (1)
UNIT
cycles
232 Timing Requirements and Switching Characteristics
Copyright © 2016â2017, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: DRA722 DRA724 DRA725 DRA726
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese