English
Language : 

DRA722_17 Datasheet, PDF (318/408 Pages) Texas Instruments – Infotainment Applications Processor
DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
www.ti.com
mmcj_clk
mmcj_cmd
mmcj_dat[i:0]
DS2
DS1
DS0
DS3
DS4
SPRS906_TIMING_MMC3_08
Figure 7-85. MMC/SD/SDIOj in - Default Speed - Transmitter Mode
7.25.3.2 MMC3 and MMC4, SD High Speed
Figure 7-86, Figure 7-87, and Table 7-124 through Table 7-127 present Timing requirements and
Switching characteristics for MMC3 and MMC4 - SD and SDIO High speed in receiver and transmitter
mode.
Table 7-124. Timing Requirements for MMC3 - SD/SDIO High Speed Mode (1)
NO. PARAMETER
HS3
HS4
HS7
HS8
tsu(cmdV-clkH)
th(clkH-cmdV)
tsu(dV-clkH)
th(clkH-dV)
(1) i in [i:0] = 7
DESCRIPTION
Setup time, mmc3_cmd valid before mmc3_clk rising clock edge
Hold time, mmc3_cmd valid after mmc3_clk rising clock edge
Setup time, mmc3_dat[i:0] valid before mmc3_clk rising clock edge
Hold time, mmc3_dat[i:0] valid after mmc3_clk rising clock edge
MIN
5.3
2.6
5.3
2.6
MAX
UNIT
ns
ns
ns
ns
Table 7-125. Switching Characteristics for MMC3 - SD/SDIO High Speed Mode (2)
NO.
HS1
HS2H
PARAMETER
fop(clk)
tw(clkH)
DESCRIPTION
Operating frequency, mmc3_clk
Pulse duration, mmc3_clk high
HS2L tw(clkL)
Pulse duration, mmc3_clk low
HS5
HS6
td(clkL-cmdV)
td(clkL-dV)
Delay time, mmc3_clk falling clock edge to mmc3_cmd transition
Delay time, mmc3_clk falling clock edge to mmc3_dat[i:0] transition
(1) P = output mmc3_clk period in ns
(2) i in [i:0] = 7
MIN
0.5*P-
0.270 (1)
0.5*P-
0.270 (1)
-7.6
-7.6
MAX
48
3.6
3.6
UNIT
MHz
ns
ns
ns
ns
Table 7-126. Timing Requirements for MMC4 - High Speed Mode (1)
NO. PARAMETER
HS3
tsu(cmdV-clkH)
HS4
th(clkH-cmdV)
HS7 tsu(dV-clkH)
HS8 th(clkH-dV)
(1) i in [i:0] = 3
DESCRIPTION
MIN
Setup time, mmc4_cmd valid before mmc4_clk rising clock edge
5.3
Hold time, mmc4_cmd valid after mmc4_clk rising clock edge
1.6
Setup time, mmc4_dat[i:0] valid before mmc4_clk rising clock edge
5.3
Hold time, mmc4_dat[i:0] valid after mmc4_clk rising clock edge
1.6
MAX
UNIT
ns
ns
ns
ns
Table 7-127. Switching Characteristics for MMC4 - High Speed Mode (2)
NO.
HS1
HS2H
PARAMETER
fop(clk)
tw(clkH)
DESCRIPTION
Operating frequency, mmc4_clk
Pulse duration, mmc4_clk high
MIN
0.5*P-
0.270 (1)
MAX
48
UNIT
MHz
ns
318 Timing Requirements and Switching Characteristics
Copyright © 2016–2017, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: DRA722 DRA724 DRA725 DRA726