DRA722_17 Datasheet, PDF (221/408 Pages) Texas Instruments – Infotainment Applications Processor

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DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
Manual IO Timings Modes must be used to guaranteed some IO timings for VOUT3. See Table 7-2
Modes Summary for a list of IO timings requiring the use of Manual IO Timings Modes. See Table 7-21
Manual Functions Mapping for DSS VOUT3 for a definition of the Manual modes.
Table 7-21 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in
the CFG_x registers.
BALL
R6
T9
N9
P9
T6
T7
P6
R9
R5
P5
N7
R4
M6
M2
J1
J2
H1
J3
H2
H3
L5
M1
L6
L4
L3
L2
L1
K2
P1
Table 7-21. Manual Functions Mapping for DSS VOUT3
BALL NAME
gpmc_a0
gpmc_a1
gpmc_a10
gpmc_a11
gpmc_a2
gpmc_a3
gpmc_a4
gpmc_a5
gpmc_a6
gpmc_a7
gpmc_a8
gpmc_a9
gpmc_ad0
gpmc_ad1
gpmc_ad10
gpmc_ad11
gpmc_ad12
gpmc_ad13
gpmc_ad14
gpmc_ad15
gpmc_ad2
gpmc_ad3
gpmc_ad4
gpmc_ad5
gpmc_ad6
gpmc_ad7
gpmc_ad8
gpmc_ad9
gpmc_cs3
VOUT3_MANUAL1
A_DELAY (ps)
G_DELAY (ps)
2395
0
2412
0
2473
0
2906
0
2360
0
2391
0
2626
0
2338
0
2374
0
2432
0
3155
0
2309
0
2360
0
2420
0
2235
0
2253
0
1949
427
2318
0
2123
0
2195
29
2617
0
2350
0
2324
0
2371
0
2231
0
2440
0
2479
0
2355
0
0
641
CFG REGISTER
CFG_GPMC_A0_OUT
CFG_GPMC_A1_OUT
CFG_GPMC_A10_OUT
CFG_GPMC_A11_OUT
CFG_GPMC_A2_OUT
CFG_GPMC_A3_OUT
CFG_GPMC_A4_OUT
CFG_GPMC_A5_OUT
CFG_GPMC_A6_OUT
CFG_GPMC_A7_OUT
CFG_GPMC_A8_OUT
CFG_GPMC_A9_OUT
CFG_GPMC_AD0_OUT
CFG_GPMC_AD1_OUT
CFG_GPMC_AD10_OU
T
CFG_GPMC_AD11_OU
T
CFG_GPMC_AD12_OU
T
CFG_GPMC_AD13_OU
T
CFG_GPMC_AD14_OU
T
CFG_GPMC_AD15_OU
T
CFG_GPMC_AD2_OUT
CFG_GPMC_AD3_OUT
CFG_GPMC_AD4_OUT
CFG_GPMC_AD5_OUT
CFG_GPMC_AD6_OUT
CFG_GPMC_AD7_OUT
CFG_GPMC_AD8_OUT
CFG_GPMC_AD9_OUT
CFG_GPMC_CS3_OUT
MUXMODE
3
vout3_d16
vout3_d17
vout3_de
vout3_fld
vout3_d18
vout3_d19
vout3_d20
vout3_d21
vout3_d22
vout3_d23
vout3_hsync
vout3_vsync
vout3_d0
vout3_d1
vout3_d10
vout3_d11
vout3_d12
vout3_d13
vout3_d14
vout3_d15
vout3_d2
vout3_d3
vout3_d4
vout3_d5
vout3_d6
vout3_d7
vout3_d8
vout3_d9
vout3_clk
7.8 Display Subsystem - High-Definition Multimedia Interface (HDMI)
The High-Definition Multimedia Interface is provided for transmitting digital television audiovisual signals
from DVD players, set-top boxes and other audiovisual sources to television sets, projectors and other
video displays. The HDMI interface is aligned with the HDMI TMDS single stream standard v1.4a (720p
@60Hz to 1080p @24Hz) and the HDMI v1.3 (1080p @60Hz): 3 data channels, plus 1 clock channel is
supported (differential).
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Timing Requirements and Switching Characteristics 221
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