DRA722_17 Datasheet, PDF (7/408 Pages) Texas Instruments – Infotainment Applications Processor

www.ti.com
DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
Table 3-1. Device Comparison (continued)
Features
Camera Adaptation Layer (CAL) Camera Serial
Interface 2 (CSI2)
Multichannel Audio Serial Port (McASP)
MultiMedia Card/Secure Digital/Secure Digital Input
Output Interface (MMC/SD/SDIO)
CSI2_0
CSI2_1
McASP1
McASP2
McASP3
McASP4
McASP5
McASP6
McASP7
McASP8
MMC1
MMC2
MMC3
MMC4
PCI Express 3.0 Port with Integrated PHY
PCIe_SS1
PCIe_SS2
Serial Advanced Technology Attachment (SATA)
SATA
Real-Time Clock Subsystem (RTCSS)
RTCSS
Multichannel Serial Peripheral Interface (McSPI)
McSPI
HDQ1W
HDQ1W
Quad SPI (QSPI)
QSPI
Spinlock Module
SPINLOCK
Keyboard Controller (KBD)
KBD
Timers, General-Purpose
TIMERS GP
Timer, Watchdog
WD TIMER
PWMSS1
Pulse-Width Modulation Subsystem (PWMSS)
PWMSS2
PWMSS3
Universal Asynchronous Receiver/Transmitter (UART) UART
Universal Serial Bus (USB3.0)
USB1 (Super-Speed,
Dual-Role-Device
[DRD])
Universal Serial Bus (USB2.0)
USB2 (High-Speed,
Dual-Role-Device
[DRD], with
embedded HS PHY)
USB3 (High-Speed,
OTG2.0, with ULPI)
USB4 (High-Speed,
OTG2.0, with ULPI)
Device
DRA722
DRA724
DRA725
DRA726
1 CLK + 4 Data
1 CLK + 2 Data
16 serializers
16 serializers
4 serializers
4 serializers
4 serializers
4 serializers
4 serializers
4 serializers
1x UHSI 4b
1x eMMC 8b
1x SDIO 8b
1x SDIO 4b
Up to two lanes (second lane shared with PCIe_SS2 and
USB1)
Single lane (shared with PCIe_SS1 and USB1)
Yes
Yes
4
Yes
Yes
Yes
Yes
16
Yes
Yes
Yes
Yes
10
Yes
Yes
Yes
No
Copyright © 2016–2017, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: DRA722 DRA724 DRA725 DRA726
Device Comparison
7