DRA722_17 Datasheet, PDF (151/408 Pages) Texas Instruments – Infotainment Applications Processor

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DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
Instance Name
TIMER15
TIMER16
TPCC
TPTC1
TPTC2
UART1
UART2
UART3
UART4
UART5
UART6
UART7
UART8
Table 5-9. Maximum Supported Frequency (continued)
Module
Input Clock Name
TIMER15_ICLK
TIMER15_FCLK
Clock
Type
Int
Func
Max. Clock
Allowed (MHz)
266
100
PRCM Clock Name
L4PER3_L3_GICLK
TIMER15_GFCLK
Clock Sources
PLL / OSC /
Source Clock
Name
CORE_X2_CLK
SYS_CLK1
FUNC_32K_CLK
TIMER16_ICLK
TIMER16_FCLK
Int
Func
SYS_CLK2
XREF_CLK0
XREF_CLK1
XREF_CLK2
XREF_CLK3
DPLL_ABE_X2_CL
K
VIDEO1_CLK
HDMI_CLK
266
L4PER3_L3_GICLK CORE_X2_CLK
100
TIMER16_GFCLK
SYS_CLK1
FUNC_32K_CLK
TPCC_GCLK
TPTC0_GCLK
TPTC1_GCLK
UART1_FCLK
UART1_ICLK
UART2_FCLK
UART2_ICLK
UART3_FCLK
UART3_ICLK
UART4_FCLK
UART4_ICLK
UART5_FCLK
UART5_ICLK
UART6_FCLK
UART6_ICLK
UART7_FCLK
UART7_ICLK
UART8_FCLK
UART8_ICLK
Int
Int
Int
Func
Int
Func
Int
Func
Int
Func
Int
Func
Int
Func
Int
Func
Int
Func
Int
SYS_CLK2
XREF_CLK0
XREF_CLK1
XREF_CLK2
XREF_CLK3
DPLL_ABE_X2_CL
K
VIDEO1_CLK
HDMI_CLK
266
L3MAIN1_L3_GICLK CORE_X2_CLK
266
L3MAIN1_L3_GICLK CORE_X2_CLK
266
L3MAIN1_L3_GICLK CORE_X2_CLK
48
UART1_GFCLK
FUNC_192M_CLK
266
L4PER_L3_GICLK
CORE_X2_CLK
48
UART2_GFCLK
FUNC_192M_CLK
266
L4PER_L3_GICLK
CORE_X2_CLK
48
UART3_GFCLK
FUNC_192M_CLK
266
L4PER_L3_GICLK
CORE_X2_CLK
48
UART4_GFCLK
FUNC_192M_CLK
266
L4PER_L3_GICLK
CORE_X2_CLK
48
UART5_GFCLK
FUNC_192M_CLK
266
L4PER_L3_GICLK
CORE_X2_CLK
48
UART6_GFCLK
FUNC_192M_CLK
266
IPU_L3_GICLK
CORE_X2_CLK
48
UART7_GFCLK
FUNC_192M_CLK
266
L4PER2_L3_GICLK CORE_X2_CLK
48
UART8_GFCLK
FUNC_192M_CLK
266
L4PER2_L3_GICLK CORE_X2_CLK
PLL / OSC /
Source Name
DPLL_CORE
OSC1
OSC1
RTC Oscillator
OSC2
XREF_CLK0
XREF_CLK1
XREF_CLK2
XREF_CLK3
DPLL_ABE
DPLL_VIDEO1
DPLL_HDMI
DPLL_CORE
OSC1
OSC1
RTC Oscillator
OSC2
XREF_CLK0
XREF_CLK1
XREF_CLK2
XREF_CLK3
DPLL_ABE
DPLL_VIDEO1
DPLL_HDMI
DPLL_CORE
DPLL_CORE
DPLL_CORE
DPLL_PER
DPLL_CORE
DPLL_PER
DPLL_CORE
DPLL_PER
DPLL_CORE
DPLL_PER
DPLL_CORE
DPLL_PER
DPLL_CORE
DPLL_PER
DPLL_CORE
DPLL_PER
DPLL_CORE
DPLL_PER
DPLL_CORE
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Specifications 151