DRA722_17 Datasheet, PDF (22/408 Pages) Texas Instruments – Infotainment Applications Processor

DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
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BALL NUMBER
[1]
BALL NAME [2]
P5
gpmc_a7
N7
gpmc_a8
R4
gpmc_a9
N9
gpmc_a10
SIGNAL NAME [3]
gpmc_a7
vin1a_d23
vout3_d23
vin2a_d7
vin1a_d7
vin1b_d7
uart8_txd
uart6_rtsn
gpio1_29
Driver off
gpmc_a8
vin1a_hsync0
vout3_hsync
vin1b_hsync1
timer12
spi4_sclk
gpio1_30
Driver off
gpmc_a9
vin1a_vsync0
vout3_vsync
vin1b_vsync1
timer11
spi4_d1
gpio1_31
Driver off
gpmc_a10
vin1a_de0
vout3_de
vin1b_clk1
timer10
spi4_d0
gpio2_0
Driver off
Table 4-2. Ball Characteristics⁽¹⁾ (continued)
MUXMODE
[4]
TYPE [5]
0
O
2
I
3
O
4
I
BALL
RESET
STATE [6]
BALL
RESET REL.
STATE [7]
BALL
RESET REL.
MUXMODE
[8]
I/O
VOLTAGE
VALUE [9]
POWER [10]
HYS [11]
PD
PD
15
1.8/3.3
vddshv10 Yes
BUFFER
TYPE [12]
PULL
UP/DOWN
TYPE [13]
DSIS [14]
Dual Voltage PU/PD
LVCMOS
0
6
I
0
7
O
8
O
14
IO
15
I
0
O
PD
PD
15
1.8/3.3
vddshv10 Yes
Dual Voltage PU/PD
2
I
LVCMOS
0
3
O
6
I
0
7
IO
8
IO
0
14
IO
15
I
0
O
PD
PD
15
1.8/3.3
vddshv10 Yes
Dual Voltage PU/PD
2
I
LVCMOS
0
3
O
6
I
0
7
IO
8
IO
0
14
IO
15
I
0
O
PD
PD
15
1.8/3.3
vddshv10 Yes
Dual Voltage PU/PD
2
I
LVCMOS
0
3
O
6
I
0
7
IO
8
IO
0
14
IO
15
I
22
Terminal Configuration and Functions
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