DRA722_17 Datasheet, PDF (145/408 Pages) Texas Instruments – Infotainment Applications Processor

www.ti.com
DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
Instance Name
OCP2SCP2
OCP2SCP3
PCIESS1
PCIESS2
PRCM_MPU
PWMSS1
PWMSS2
PWMSS3
QSPI
RNG
RTC_SS
SAR_ROM
SATA
SDMA
SHA2MD51
SHA2MD52
SL2
Table 5-9. Maximum Supported Frequency (continued)
Module
Input Clock Name
L4CFG2_ADAPTE
R_CLKIN
L4CFG3_ADAPTE
R_CLKIN
PCIE1_PHY_WKU
P_CLK
PCIe_SS1_FICLK
PCIEPHY_CLK
PCIEPHY_CLK_DI
V
PCIE1_REF_CLKI
N
PCIE1_PWR_CLK
PCIE2_PHY_WKU
P_CLK
PCIe_SS2_FICLK
PCIEPHY_CLK
PCIEPHY_CLK_DI
V
PCIE2_REF_CLKI
N
PCIE2_PWR_CLK
32K_CLK
SYS_CLK
PWMSS1_GICLK
PWMSS2_GICLK
PWMSS3_GICLK
QSPI_ICLK
QSPI_FCLK
RNG_ICLK
RTC_ICLK
RTC_FCLK
PRCM_ROM_CLO
CK
SATA_FICLK
SATA_PMALIVE_F
CLK
REF_CLK
SDMA_FCLK
SHAM_1_CLK
SHAM_2_CLK
IVA_GCLK
Clock
Type
Int
Int
Func
Int
Func
Func
Func
Func
Func
Func
Func
Func
Func
Func
Func
Func
Int &
Func
Int &
Func
Int &
Func
Int
Func
Int
Int
Func
Int
Int
Func
Func
Int &
Func
Int
Int
Int
Max. Clock
Allowed (MHz)
133
PRCM Clock Name
L4CFG_L4_GICLK
Clock Sources
PLL / OSC /
Source Clock
Name
CORE_X2_CLK
133
L3INIT_L4_GICLK
CORE_X2_CLK
0.032
PCIE_32K_GFCLK FUNC_32K_CLK
266
2500
1250
34.3
38.4
0.032
PCIE_L3_GICLK
CORE_X2_CLK
PCIE_PHY_GCLK PCIE_PHY_GCLK
PCIE_PHY_DIV_GCLK PCIE_PHY_DIV_G
CLK
PCIE_REF_GFCLK CORE_USB_OTG_
SS_LFPS_TX_CLK
PCIE_SYS_GFCLK
SYS_CLK1
PCIE_32K_GFCLK FUNC_32K_CLK
266
2500
1250
34.3
38.4
0.032
38.4
266
PCIE_L3_GICLK
CORE_X2_CLK
PCIE_PHY_GCLK PCIE_PHY_GCLK
PCIE_PHY_DIV_GCLK PCIE_PHY_DIV_G
CLK
PCIE_REF_GFCLK CORE_USB_OTG_
SS_LFPS_TX_CLK
PCIE_SYS_GFCLK
SYS_CLK1
FUNC_32K_CLK
SYS_CLK1/610
WKUPAON_ICLK
SYS_CLK1
DPLL_ABE_X2_CL
K
L4PER2_L3_GICLK CORE_X2_CLK
266
L4PER2_L3_GICLK CORE_X2_CLK
266
L4PER2_L3_GICLK CORE_X2_CLK
266
128
266
133
RTC_FCLK
266
L4PER2_L3_GICLK
QSPI_GFCLK
L4SEC_L3_GICLK
RTC_L4_GICLK
RTC_AUX_CLK
FUNC_32K_CLK
L4CFG_L3_GICLK
CORE_X2_CLK
FUNC_256M_CLK
PER_QSPI_CLK
CORE_X2_CLK
CORE_X2_CLK
SYS_32K
SYS_CLK1/610
CORE_X2_CLK
266
L3INIT_L3_GICLK
CORE_X2_CLK
48
L3INIT_48M_GFCLK FUNC_192M_CLK
38
SATA_REF_GFCLK
SYS_CLK1
266
DMA_L3_GICLK
CORE_X2_CLK
266
266
IVA_GCLK
L4SEC_L3_GICLK
L4SEC_L3_GICLK
IVA_GCLK
CORE_X2_CLK
CORE_X2_CLK
IVA_GFCLK
PLL / OSC /
Source Name
DPLL_CORE
DPLL_CORE
RTC Oscillator
DPLL_CORE
APLL_PCIE
APLL_PCIE
DPLL_CORE
OSC1
RTC Oscillator
DPLL_CORE
APLL_PCIE
APLL_PCIE
DPLL_CORE
OSC1
OSC1
OSC1
DPLL_ABE
DPLL_CORE
DPLL_CORE
DPLL_CORE
DPLL_CORE
DPLL_PER
DPLL_PER
DPLL_CORE
DPLL_CORE
RTC Oscillator
OSC1
DPLL_CORE
DPLL_CORE
DPLL_PER
OSC1
DPLL_CORE
DPLL_CORE
DPLL_CORE
DPLL_IVA
Copyright © 2016–2017, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: DRA722 DRA724 DRA725 DRA726
Specifications 145