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DRA722_17 Datasheet, PDF (181/408 Pages) Texas Instruments – Infotainment Applications Processor
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DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
(1) To switch from bypass mode to crystal or from crystal mode to bypass mode, there is a waiting time about 100 μs; however, if the chip
comes from bypass mode to crystal mode the crystal will start-up after time mentioned in Table 6-6, tsX parameter.
(2) Before the processor boots up and the oscillator is set to bypass mode, there is a waiting time when the internal oscillator is in
application mode and receives a wave. The switching time in this case is about 100 μs.
Table 6-8 details the OSC1 input clock timing requirements.
Table 6-8. OSC1 Input Clock Timing Requirements
NAME
CK0
CK1
1/
tc(xiosc1)
DESCRIPTION
Frequency, xi_osc1
tw(xiosc1) Pulse duration, xi_osc1 low or high
tj(xiosc1) Period jitter(1), xi_osc1
MIN
TYP
MAX
Range from 12 to 38.4
0.45 *
tc(xiosc1)
0.55 *
tc(xiosc1)
0.01 ×
tc(xiosc1)
(3)
tR(xiosc1) Rise time, xi_osc1
tF(xiosc1) Fall time, xi_osc1
Ethernet and MLB not used
tj(xiosc1) Frequency accuracy(2), xi_osc1
Ethernet RGMII and RMII
using derived clock
Ethernet MII using derived
clock
MLB using derived clock
(1) Period jitter is meant here as follows:
– The maximum value is the difference between the longest measured clock period and the expected clock period
– The minimum value is the difference between the shortest measured clock period and the expected clock period
(2) Crystal characteristics should account for tolerance+stability+aging.
(3) The Period jitter requirement for osc1 can be relaxed to 0.02*tc(xiosc1) under the following constraints:
a.The osc1/SYS_CLK2 clock bypasses all device PLLs
b.The osc1/SYS_CLK2 clock is only used to source the DSS pixel clock outputs
5
5
±200
±50
±100
±50
UNIT
MHz
ns
ns
ns
ns
ppm
xi_osc1
CK0
CK1
Figure 6-9. xi_osc1 Input Clock
CK1
SPRS906_CLK_08
6.1.4 RTC Oscillator Input Clock
SYS_32K is received directly from RTC Oscillator. For more information about SYS_32K see the Device
TRM, Power, Reset, and Clock Management chapter.
6.1.4.1 RTC Oscillator External Crystal
An external crystal is connected to the device pins. Figure 6-10 describes the crystal implementation.
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Clock Specifications 181