DRA722_17 Datasheet, PDF (294/408 Pages) Texas Instruments – Infotainment Applications Processor

DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
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Table 7-84. Timing Requirements for GMAC RGMIIn Input Receive for 10/100/1000 Mbps ⁽¹⁾
NO. PARAMETER DESCRIPTION
5
t_su(RXD-RXCH)
Setup time, receive selected signals valid before
rgmiin_rxc high/low
6
t_h(RXCH-RXD)
Hold time, receive selected signals valid after
rgmiin_rxc high/low
(1) For RGMII, receive selected signals include: rgmiin_rxd[3:0] and rgmiin_rxctl.
MODE
RGMII0/1
RGMII0/1
MIN MAX UNIT
1
ns
1
ns
rgmiin_rxc^(A)
rgmiin_rxd[3:0]^(B)
1
2
3
4
4
5
1st Half-byte
2nd Half-byte
6
RGRXD[3:0] RGRXD[7:4]
rgmiin_rxctl^(B)
RXDV
RXERR
SPRS906_TIMING_GMAC_RGMIIRX_08
A. rgmiin_rxc must be externally delayed relative to the data and control pins.
B. Data and control information is received using both edges of the clocks. rgmiin_rxd[3:0] carries data bits 3-0 on the
rising edge of rgmiin_rxc and data bits 7-4 on the falling edge ofrgmiin_rxc. Similarly, rgmiin_rxctl carries RXDV on
rising edge of rgmiin_rxc and RXERR on falling edge of rgmiin_rxc.
Figure 7-60. GMAC Receive Interface Timing, RGMIIn operation
Table 7-85, Table 7-86 and Figure 7-61 present switching characteristics for transmit - RGMIIn for
10/100/1000Mbit/s.
Table 7-85. Switching Characteristics Over Recommended Operating Conditions for rgmiin_txctl - RGMIIn
Operation for 10/100/1000 Mbit/s
NO. PARAMETER
1
t_c(TXC)
DESCRIPTION
Cycle time, rgmiin_txc
2
t_w(TXCH)
Pulse duration, rgmiin_txc high
3
t_w(TXCL)
Pulse duration, rgmiin_txc low
4
t_t(TXC)
Transition time, rgmiin_txc
SPEED
10 Mbps
100 Mbps
1000 Mbps
10 Mbps
100 Mbps
1000 Mbps
10 Mbps
100 Mbps
1000 Mbps
10 Mbps
100 Mbps
1000 Mbps
MIN MAX UNIT
360
440
ns
36
44
ns
7.2
8.8
ns
160
240
ns
16
24
ns
3.6
4.4
ns
160
240
ns
16
24
ns
3.6
4.4
ns
0.75
ns
0.75
ns
0.75
ns
294 Timing Requirements and Switching Characteristics
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