DRA722_17 Datasheet, PDF (180/408 Pages) Texas Instruments – Infotainment Applications Processor

DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
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Table 6-5. OSC1 Crystal Electrical Characteristics (continued)
NAME
DESCRIPTION
Ethernet and MLB not used
t_j(xiosc1)
Frequency accuracy⁽¹⁾, xi_osc1
Ethernet RGMII and RMII
using derived clock
Ethernet MII using derived
clock
MLB using derived clock
(1) Crystal characteristics should account for tolerance+stability+aging.
MIN
TYP
MAX UNIT
±200
±50
ppm
±100
±50
When selecting a crystal, the system design must take into account the temperature and aging
characteristics of a crystal versus the user environment and expected lifetime of the system.
Table 6-6 details the switching characteristics of the oscillator and the requirements of the input clock.
NAME
f_p
t_sX
Table 6-6. Oscillator Switching Characteristics—Crystal Mode
DESCRIPTION
Oscillation frequency
Start-up time
MIN
TYP
Range from 19.2 to 32
MAX
4
UNIT
MHz
ms
6.1.3.2 OSC1 Input Clock
A 1.8-V LVCMOS-Compatible Clock Input can be used instead of the internal oscillator to provide the
SYS_CLKIN2 clock input to the system. The external connections to support this are shown in, Figure 6-8.
The xi_osc1 pin is connected to the 1.8-V LVCMOS-Compatible clock sources. The xo_osc1 pin is left
unconnected. The vssa_osc1 pin is connected to board ground (vss).
Device
xi_osc1
xo_osc1
vssa_osc1
NC
SPRS906_CLK_07
Figure 6-8. 1.8-V LVCMOS-Compatible Clock Input
Table 6-7 summarizes the OSC1 input clock electrical characteristics.
NAME
f
C_IN
I_IN
t_sX
Table 6-7. OSC1 Input Clock Electrical Characteristics—Bypass Mode
DESCRIPTION
Frequency
Input capacitance
Input current (3.3V mode)
Start-up time⁽¹⁾
MIN
TYP
Range from 12 to 38.4
2.819
3.019
4
6
See⁽²⁾
MAX
3.219
10
UNIT
MHz
pF
µA
ms
180 Clock Specifications
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