DRA722_17 Datasheet, PDF (103/408 Pages) Texas Instruments – Infotainment Applications Processor

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DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
Table 4-14. SPI Signal Descriptions (continued)
SIGNAL NAME DESCRIPTION
TYPE
BALL
spi4_cs0
SPI4 Chip Select
IO
P9/ F3/ AA4/ U6/
AB5
spi4_cs1
SPI4 Chip Select
IO
P4 / Y1
spi4_cs2
SPI4 Chip Select
IO
R3 / W9
spi4_cs3
SPI4 Chip Select
IO
T2 / V9
(1) This clock signal is implemented as 'pad loopback' inside the device - the output signal is looped back through the input buffer to serve
as the internal reference signal. Series termination is recommended (as close to device pin as possible) to improve signal integrity of the
clock input. Any nonmonotonicity in voltage that occurs at the pad loopback clock pin between V_IH and V_IL must be less than V_HYS.
4.4.12 Quad Serial Peripheral Interface (QSPI)
NOTE
For more information about UART booting, see the Initialization / Device Initialization by
ROM Code / Memory Booting / SPI/QSPI Flash Devices section of the device TRM.
SIGNAL NAME
qspi1_sclk
qspi1_rtclk
qspi1_d0
qspi1_d1
qspi1_d2
qspi1_d3
qspi1_cs0
qspi1_cs1
qspi1_cs2
qspi1_cs3
Table 4-15. QSPI Signal Descriptions
DESCRIPTION
QSPI1 Serial Clock
QSPI1 Return Clock Input. Must be connected from QSPI1_SCLK on PCB. Refer
to PCB Guidelines for QSPI1
QSPI1 Data[0]. This pin is output data for all commands/writes and for dual read
and quad read modes it becomes input data pin during read phase.
QSPI1 Data[1]. Input read data in all modes.
QSPI1 Data[2]. This pin is used only in quad read mode as input data pin during
read phase
QSPI1 Data[3]. This pin is used only in quad read mode as input data pin during
read phase
QSPI1 Chip Select[0]. This pin is Used for QSPI1 boot modes.
QSPI1 Chip Select[1]
QSPI1 Chip Select[2]
QSPI1 Chip Select[3]
TYPE
IO
I
IO
IO
IO
IO
IO
O
O
O
4.4.13 Multicannel Audio Serial Port (McASP)
BALL
R2
R3
U1
P3
U2
T2
P2
P1
T7
P6
NOTE
For more information, see the Serial Communication Interface / Multichannel Audio Serial
Port (McASP) section of the device TRM.
Table 4-16. McASP Signal Descriptions
SIGNAL NAME DESCRIPTION
Multichannel Audio Serial Port 1
mcasp1_axr0
McASP1 Transmit/Receive Data
mcasp1_axr1
McASP1 Transmit/Receive Data
mcasp1_axr2
McASP1 Transmit/Receive Data
mcasp1_axr3
McASP1 Transmit/Receive Data
mcasp1_axr4
McASP1 Transmit/Receive Data
mcasp1_axr5
McASP1 Transmit/Receive Data
mcasp1_axr6
McASP1 Transmit/Receive Data
mcasp1_axr7
McASP1 Transmit/Receive Data
TYPE
IO
IO
IO
IO
IO
IO
IO
IO
BALL
G12
F12
G13
J11
D18/ E12
E17 / F13
B26 / C12
C23 / D12
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Terminal Configuration and Functions 103
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