DRA722_17 Datasheet, PDF (296/408 Pages) Texas Instruments – Infotainment Applications Processor

DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
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SIGNALS
rgmii1_rxd1
rgmii1_rxd0
rgmii1_rxctl
rgmii1_txc
rgmii1_txctl
rgmii1_rxc
rgmii0_txd3
rgmii0_txd2
rgmii0_txd1
rgmii0_txd0
rgmii0_rxd3
rgmii0_rxd2
rgmii0_rxd1
rgmii0_rxd0
rgmii0_txc
rgmii0_rxctl
rgmii0_rxc
rgmii0_txctl
Table 7-87. GMAC RGMII IOSETs (continued)
BALL
B5
A4
A3
D5
C2
C5
IOSET3
MUX
3
3
3
3
3
3
BALL
V7
U7
V6
U6
V4
V3
Y2
W2
W9
V5
U5
V9
IOSET4
MUX
0
0
0
0
0
0
0
0
0
0
0
0
NOTE
To configure the desired Manual IO Timing Mode the user must follow the steps described in
section "Manual IO Timing Modes" of the Device TRM.
The associated registers to configure are listed in the CFG REGISTER column. For more
information please see the Control Module Chapter in the Device TRM.
296 Timing Requirements and Switching Characteristics
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