DRA722_17 Datasheet, PDF (313/408 Pages) Texas Instruments – Infotainment Applications Processor

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DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
Table 7-115. Switching Characteristics for MMC2 - JEDS84 HS200 Mode
NO. PARAMETER
HS2001 fop(clk)
HS2002H t_w(clkH)
DESCRIPTION
Operating frequency, mmc2_clk
Pulse duration, mmc2_clk high
HS2002L t_w(clkL)
Pulse duration, mmc2_clk low
HS2005 t_d(clkL-cmdV)
Delay time, mmc2_clk falling clock edge to mmc2_cmd transition
HS2006 t_d(clkL-dV)
Delay time, mmc2_clk falling clock edge to mmc2_dat[7:0] transition
(1) P = output mmc2_clk period in ns
MIN
0.5*P-
0.172 (1)
0.5*P-
0.172 (1)
-1.136
-1.136
MAX
192
0.536
0.536
UNIT
MHz
ns
ns
ns
ns
mmc2_clk
mmc2_cmd
mmc2_dat[7:0]
HS2001
HS2002L
HS2005
HS2006
HS2002H
HS2005
HS2006
Figure 7-81. eMMC in - HS200 SDR - Transmitter Mode
SPRS906_TIMING_MMC2_05
7.25.2.4 High-speed JC64 DDR, 8-bit data
Table 7-116 and Table 7-117 present Timing requirements and Switching characteristics for MMC2 - High
speed DDR in receiver and transmitter mode (see Figure 7-82 and Figure 7-83).
Table 7-116. Timing Requirements for MMC2 - JC64 High Speed DDR Mode
NO. PARAMETER
DDR3 t_su(cmdV-clk)
DDR4 t_h(clk-cmdV)
DDR7 t_su(dV-clk)
DDR8 t_h(clk-dV)
DESCRIPTION
Setup time, mmc2_cmd valid before mmc2_clk
transition
Hold time, mmc2_cmd valid after mmc2_clk
transition
Setup time, mmc2_dat[7:0] valid before mmc2_clk
transition
Hold time, mmc2_dat[7:0] valid after mmc2_clk
transition
MODE
MIN MAX UNIT
1.8
ns
1.6
ns
1.8
ns
Pad Loopback (1.8V and 3.3V), 1.6
ns
Boot
Internal Loopback (1.8V with 1.86
ns
MMC2_VIRTUAL2)
Internal Loopback (3.3V with 1.95
ns
MMC2_VIRTUAL2)
Internal Loopback (1.8V with
ns
MMC2_MANUAL2)
Internal Loopback (3.3V with 1.6
ns
MMC2_MANUAL2)
Table 7-117. Switching Characteristics for MMC2 - JC64 High Speed DDR Mode
NO.
DDR1
DDR2H
PARAMETER
fop(clk)
t_w(clkH)
DDR2L t_w(clkL)
DESCRIPTION
Operating frequency, mmc2_clk
Pulse duration, mmc2_clk high
Pulse duration, mmc2_clk low
MIN
0.5*P-
0.172
0.5*P-
0.172
MAX
48
(1)
(1)
UNIT
MHz
ns
ns
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Timing Requirements and Switching Characteristics 313
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