DRA722_17 Datasheet, PDF (202/408 Pages) Texas Instruments – Infotainment Applications Processor

DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
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BALL
AC5
AB4
AD4
AC4
AC7
AC6
AC9
AC3
AC8
AD6
AB8
AB5
B2
D6
C5
A3
B3
B4
B5
A4
G2
H7
G1
G6
BALL NAME
gpio6_10
gpio6_11
mmc3_clk
mmc3_cmd
mmc3_dat0
mmc3_dat1
mmc3_dat2
mmc3_dat3
mmc3_dat4
mmc3_dat5
mmc3_dat6
mmc3_dat7
vin2a_d16
vin2a_d17
vin2a_d18
vin2a_d19
vin2a_d20
vin2a_d21
vin2a_d22
vin2a_d23
vin2a_de0
vin2a_fld0
vin2a_hsync0
vin2a_vsync0
Table 7-8. Manual Functions Mapping for VIN2B (IOSET1/2/7)
VIP_MANUAL4
VIP_MANUAL6
A_DELAY (ps) G_DELAY (ps) A_DELAY (ps) G_DELAY (ps)
2829
884
3009
892
2648
1033
2890
1096
2794
1074
2997
1089
2789
1162
2959
1210
2689
1180
2897
1269
2605
1219
2891
1219
2616
703
2947
590
2760
1235
2931
1342
2757
880
2979
891
2688
1177
2894
1262
2638
1165
2894
1187
995
182
1202
107
1423
0
1739
0
1253
0
1568
0
2080
0
2217
0
1849
0
2029
0
1881
50
2202
0
1917
167
2313
0
1955
79
2334
0
1899
145
2288
0
1568
261
2048
0
0
0
0
0
1793
0
2011
0
1382
0
1632
0
CFG REGISTER
CFG_GPIO6_10_IN
CFG_GPIO6_11_IN
CFG_MMC3_CLK_IN
CFG_MMC3_CMD_IN
CFG_MMC3_DAT0_IN
CFG_MMC3_DAT1_IN
CFG_MMC3_DAT2_IN
CFG_MMC3_DAT3_IN
CFG_MMC3_DAT4_IN
CFG_MMC3_DAT5_IN
CFG_MMC3_DAT6_IN
CFG_MMC3_DAT7_IN
CFG_VIN2A_D16_IN
CFG_VIN2A_D17_IN
CFG_VIN2A_D18_IN
CFG_VIN2A_D19_IN
CFG_VIN2A_D20_IN
CFG_VIN2A_D21_IN
CFG_VIN2A_D22_IN
CFG_VIN2A_D23_IN
CFG_VIN2A_DE0_IN
CFG_VIN2A_FLD0_IN
CFG_VIN2A_HSYNC0_IN
CFG_VIN2A_VSYNC0_IN
2
-
-
-
-
-
-
-
-
-
-
-
-
vin2b_d7
vin2b_d6
vin2b_d5
vin2b_d4
vin2b_d3
vin2b_d2
vin2b_d1
vin2b_d0
vin2b_fld1
vin2b_clk1
-
-
MUXMODE
3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
vin2b_de1
-
vin2b_hsync1
vin2b_vsync1
4
vin2b_hsync1
vin2b_vsync1
vin2b_d7
vin2b_d6
vin2b_d5
vin2b_d4
vin2b_d3
vin2b_d2
vin2b_d1
vin2b_d0
vin2b_de1
vin2b_clk1
-
-
-
-
-
-
-
-
-
-
-
-
Manual IO Timings Modes must be used to guaranteed some IO timings for VIP1. See Table 7-2 Modes Summary for a list of IO timings requiring
the use of Manual IO Timings Modes. See Table 7-9 Manual Functions Mapping for VIN1A (IOSET2/3) and VIN1B (IOSET4) and VIN2B (IOSET8)
for a definition of the Manual modes.
Table 7-9 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in the CFG_x registers.
202 Timing Requirements and Switching Characteristics
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