DRA722_17 Datasheet, PDF (166/408 Pages) Texas Instruments – Infotainment Applications Processor

DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
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porz
vddshv8
vdda33v_usb1, vdda33v_usb2
vddshv1, vddshv2, vddshv3, vddshv4,
vddshv6, vddshv7, vddshv9, vddshv10,
vddshv11
vdda_usb1, vdda_usb2, vdda_hdmi,
vdda_pcie, vdda_pcie0, vdda_sata,
vdda_usb3
vddshv5⁽⁴⁾
vdd_dsp
vdd_gpu
vdd_iva
vdd_mpu
vdd
vdds_ddr1, ddr1_vref0
vdda_per, vdda_ddr, vdda_debug, vdda_dsp_iva,
vdda_core_gmac, vdda_gpu, vdda_video,
vdda_mpu_abe, vdda_osc, vdda_csi
vdd_rtc⁽⁴⁾
vdds18v, vdds_mlbp, vdds18v_ddr1
Note 5 Note 6
Note 8
Note 7
vdda_rtc⁽⁴⁾
xi_osc0
SPRS906_ELCH_02
Figure 5-2. Power-Down Sequencing
(1) xi_osc0 can be turned off anytime after porz assertion and must be turned off before vdda_osc voltage rail is shutdown.
(2) Grey shaded areas are windows where it is valid to ramp the voltage rail.
(3) Blue dashed lines are not valid windows but show alternate ramp possibilities based on the associated note.
(4) If RTC-mode is supported then vdda_rtc, vdd_rtc and vddshv5 must be individually powered with separate power supplies and cannot
be combined with other rails.
(5) vdd_mpu, vdd_gpu, vdd_dsp, vdd_iva can be ramped at the same time or can be staggered.
166 Specifications
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Product Folder Links: DRA722 DRA724 DRA725 DRA726