DRA722_17 Datasheet, PDF (358/408 Pages) Texas Instruments – Infotainment Applications Processor

DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
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VBUS
Ferrite Bead
U2
U1
Ferrite Bead
5
SHIELD_GND
4
GND
3
DP
2
DM
1
+5 V
6
SHIELD_GND
USB Socket
Figure 8-23. USB Connector
SPRS906_PCB_USB20_03
8.5.2.2.2.5 Clock Routings
To address the system clock emissions between devices, place a ~10 to 130 Ω resistor in series with the
clock signal. Use a trial and error method of looking at the shape of the clock waveform on a high-speed
oscilloscope and of tuning the value of the resistance to minimize waveform distortion. The value on this
resistor should be as small as possible to get the desired effect. Place the resistor close to the device
generating the clock signal. If an external crystal is used, follow the guidelines detailed in the Selection
and Specification of Crystals for Texas Instruments USB 2.0 Devices (SLLA122).
When routing the clock traces from one device to another, try to use the 3W spacing rule. The distance
from the center of the clock trace to the center of any adjacent signal trace should be at least three times
the width of the clock trace. Many clocks, including slow frequency clocks, can have fast rise and fall
times. Using the 3W rule cuts down on crosstalk between traces. In general, leave space between each of
the traces running parallel between the devices. Avoid using right angles when routing traces to minimize
the routing distance and impedance discontinuities. For further protection from crosstalk, run guard traces
beside the clock signals (GND pin to GND pin), if possible. This lessens clock signal coupling, as shown in
Figure 8-24.
3W
3W
W
Trace
Figure 8-24. 3W Spacing Rule
SPRS906_PCB_USB20_04
358 Applications, Implementation, and Layout
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