DRA722_17 Datasheet, PDF (176/408 Pages) Texas Instruments – Infotainment Applications Processor

DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
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6.1.2 System Oscillator OSC0 Input Clock
SYS_CLKIN1 is received directly from oscillator OSC0. For more information about SYS_CLKIN1 see
Device TRM, Chapter: Power, Reset, and Clock Management.
6.1.2.1 OSC0 External Crystal
An external crystal is connected to the device pins. Figure 6-2 describes the crystal implementation.
Device
xi_osc0
xo_osc0
vssa_osc0
Crystal
Rd
(Optional)
C_f1
C_f2
SPRS906_CLK_03
Figure 6-2. OSC0 Crystal Implementation
NOTE
The load capacitors, C_f1 and C_f2 in Figure 6-2, should be chosen such that the below
equation is satisfied. C_L in the equation is the load specified by the crystal manufacturer. All
discrete components used to implement the oscillator circuit should be placed as close as
possible to the associated oscillator xi_osc0, xo_osc0, and vssa_osc0 pins.
CL=
C C _{f1 f2}
(C_f1+C_f2)
Figure 6-3. Load Capacitance Equation
The crystal must be in the fundamental mode of operation and parallel resonant. Table 6-1 summarizes
the required electrical constraints.
and Table 6-5
Table 6-1. OSC0 Crystal Electrical Characteristics
NAME
DESCRIPTION
f_p
C_f1
C_f2
ESR(C_f1,C_f2)
(1)
Parallel resonance crystal frequency
C_f1 load capacitance for crystal parallel resonance with C_f1 = C_f2
C_f2 load capacitance for crystal parallel resonance with C_f1 = C_f2
Crystal ESR
MIN TYP
19.2, 20, 27
12
12
MAX
24
24
UNIT
MHz
pF
pF
100 Ω
176 Clock Specifications
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