English
Language : 

DRA722_17 Datasheet, PDF (203/408 Pages) Texas Instruments – Infotainment Applications Processor
www.ti.com
DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
Table 7-9. Manual Functions Mapping for VIN1A (IOSET2/3) and VIN1B (IOSET4) and VIN2B (IOSET8)
BA BALL NAME
VIP_MANUAL7
VIP_MANUAL12
CFG REGISTER
LL
A_DELAY G_DELAY A_DELAY G_DELAY
2
3(1)
(ps)
(ps)
(ps)
(ps)
R6 gpmc_a0
3080
1792
3376
1632
CFG_GPMC_A0_IN vin1a_d16
-
T9 gpmc_a1
2958
1890
3249
1749
CFG_GPMC_A1_IN vin1a_d17
-
N9 gpmc_a10
3073
1653
3388
1433
CFG_GPMC_A10_IN vin1a_de0
-
P9 gpmc_a11
3014
1784
3290
1693
CFG_GPMC_A11_IN vin1a_fld0
-
K7 gpmc_a19
1385
0
1246
0
CFG_GPMC_A19_IN
-
-
T6 gpmc_a2
3041
1960
3322
1850
CFG_GPMC_A2_IN vin1a_d18
-
M7 gpmc_a20
859
0
720
0
CFG_GPMC_A20_IN
-
-
J5 gpmc_a21
1465
0
1334
0
CFG_GPMC_A21_IN
-
-
K6 gpmc_a22
1210
0
1064
0
CFG_GPMC_A22_IN
-
-
J7 gpmc_a23
1111
0
954
0
CFG_GPMC_A23_IN
-
-
J4 gpmc_a24
1137
0
1051
0
CFG_GPMC_A24_IN
-
-
J6 gpmc_a25
1402
0
1283
0
CFG_GPMC_A25_IN
-
-
H4 gpmc_a26
1298
0
1153
0
CFG_GPMC_A26_IN
-
-
H5 gpmc_a27
934
0
870
0
CFG_GPMC_A27_IN
-
-
MUXMODE
3(1)
4(1)
4(1)
-
vin2a_d0
-
-
vin2a_d1
-
-
-
-
-
vin2a_fld0 vin1a_fld0
-
vin2a_d12
-
-
vin2a_d2
-
-
vin2a_d13
-
-
vin2a_d14
-
-
vin2a_d15
-
-
vin2a_fld0
-
-
-
-
-
-
-
-
-
-
-
-
-
T7 gpmc_a3
P6 gpmc_a4
R9 gpmc_a5
R5 gpmc_a6
P5 gpmc_a7
N7 gpmc_a8
R4 gpmc_a9
M6 gpmc_ad0
M2 gpmc_ad1
J1 gpmc_ad10
J2 gpmc_ad11
H1 gpmc_ad12
J3 gpmc_ad13
H2 gpmc_ad14
H3 gpmc_ad15
L5 gpmc_ad2
3019
3063
3021
3062
3260
3033
2991
2907
2858
2920
2719
2845
2765
2845
2766
2951
2145
1981
1954
1716
1889
1702
1905
1342
1321
1384
1310
1135
1225
1150
1453
1296
3296
3357
3304
3348
3583
3328
3281
3181
3132
3223
3019
3160
3045
3153
3044
3226
2050
CFG_GPMC_A3_IN vin1a_d19
-
1829
CFG_GPMC_A4_IN vin1a_d20
-
1840
CFG_GPMC_A5_IN vin1a_d21
-
1592
CFG_GPMC_A6_IN vin1a_d22
-
1631
CFG_GPMC_A7_IN vin1a_d23
-
1547
CFG_GPMC_A8_IN vin1a_hsyn
-
c0
1766
CFG_GPMC_A9_IN vin1a_vsyn
-
c0
1255
CFG_GPMC_AD0_IN vin1a_d0
-
1234
CFG_GPMC_AD1_IN vin1a_d1
-
1204
CFG_GPMC_AD10_IN vin1a_d10
-
1198
CFG_GPMC_AD11_IN vin1a_d11
-
917
CFG_GPMC_AD12_IN vin1a_d12
-
1119
CFG_GPMC_AD13_IN vin1a_d13
-
952
CFG_GPMC_AD14_IN vin1a_d14
-
1355
CFG_GPMC_AD15_IN vin1a_d15
-
1209
CFG_GPMC_AD2_IN vin1a_d2
-
-
vin2a_d3
-
-
vin2a_d4
-
-
vin2a_d5
-
-
vin2a_d6
-
-
vin2a_d7
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
5
6
-
vin1b_d0
-
vin1b_d1
-
vin1b_clk1
-
vin1b_de1
-
vin2b_d0
-
vin1b_d2
-
vin2b_d1
-
vin2b_d2
-
vin2b_d3
-
vin2b_d4
-
vin2b_d5
-
vin2b_d6
-
vin2b_d7
-
vin2b_hsyn
c1
-
vin1b_d3
-
vin1b_d4
-
vin1b_d5
-
vin1b_d6
-
vin1b_d7
-
vin1b_hsyn
c1
-
vin1b_vsyn
c1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Copyright © 2016–2017, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: DRA722 DRA724 DRA725 DRA726
Timing Requirements and Switching Characteristics 203