DRA722_17 Datasheet, PDF (315/408 Pages) Texas Instruments – Infotainment Applications Processor

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DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
BALL
M7
J5
K6
J7
J4
J6
H4
H5
Table 7-118. Virtual Functions Mapping for MMC2 (continued)
BALL NAME
gpmc_a20
gpmc_a21
gpmc_a22
gpmc_a23
gpmc_a24
gpmc_a25
gpmc_a26
gpmc_a27
Delay Mode Value
MMC2_VIRTUAL2
13
13
13
13
13
13
13
13
MUXMODE
1
mmc2_dat5
mmc2_dat6
mmc2_dat7
mmc2_clk
mmc2_dat0
mmc2_dat1
mmc2_dat2
mmc2_dat3
NOTE
To configure the desired Manual IO Timing Mode the user must follow the steps described in
section Manual IO Timing Modes of the Device TRM.
The associated registers to configure are listed in the CFG REGISTER column. For more
information see the Control Module chapter in the Device TRM.
Manual IO Timings Modes must be used to guaranteed some IO timings for MMC2. See Table 7-2 Modes
Summary for a list of IO timings requiring the use of Manual IO Timings Modes. See Table 7-119 Manual
Functions Mapping for MMC2 for a definition of the Manual modes.
Table 7-119 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in
the CFG_x registers.
Table 7-119. Manual Functions Mapping for MMC2
BAL BALL NAME MMC2_MANUAL1
L
A_DELAY G_DELAY
(ps)
(ps)
K7 gpmc_a19
0
0
M7 gpmc_a20
119
0
J5 gpmc_a21
0
0
K6 gpmc_a22
18
0
J7 gpmc_a23
894
0
J4 gpmc_a24
30
0
J6 gpmc_a25
0
0
H4 gpmc_a26
23
0
H5 gpmc_a27
0
0
H6 gpmc_cs1
0
0
MMC2_MANUAL2
A_DELAY G_DELAY
(ps)
(ps)
0
14
127
0
22
0
72
0
410
4000
82
0
0
0
77
0
0
0
0
0
MMC2_MANUAL3
A_DELAY G_DELAY
(ps)
(ps)
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
CFG REGISTER
MUXMODE
1
CFG_GPMC_A19_IN
CFG_GPMC_A20_IN
CFG_GPMC_A21_IN
CFG_GPMC_A22_IN
CFG_GPMC_A23_IN
CFG_GPMC_A24_IN
CFG_GPMC_A25_IN
CFG_GPMC_A26_IN
CFG_GPMC_A27_IN
CFG_GPMC_CS1_IN
mmc2_dat4
mmc2_dat5
mmc2_dat6
mmc2_dat7
mmc2_clk
mmc2_dat0
mmc2_dat1
mmc2_dat2
mmc2_dat3
mmc2_cmd
K7 gpmc_a19
152
0
152
0
285
0
CFG_GPMC_A19_OUT mmc2_dat4
M7 gpmc_a20
206
0
206
0
189
0
CFG_GPMC_A20_OUT mmc2_dat5
J5 gpmc_a21
78
0
78
0
0
120
CFG_GPMC_A21_OUT mmc2_dat6
K6 gpmc_a22
2
0
2
0
0
70
CFG_GPMC_A22_OUT mmc2_dat7
J7 gpmc_a23
266
0
266
0
730
360
CFG_GPMC_A23_OUT mmc2_clk
J4 gpmc_a24
0
0
0
0
0
0
CFG_GPMC_A24_OUT mmc2_dat0
J6 gpmc_a25
0
0
0
0
0
0
CFG_GPMC_A25_OUT mmc2_dat1
H4 gpmc_a26
43
0
43
0
70
0
CFG_GPMC_A26_OUT mmc2_dat2
H5 gpmc_a27
0
0
0
0
0
0
CFG_GPMC_A27_OUT mmc2_dat3
H6 gpmc_cs1
0
0
0
0
0
120
CFG_GPMC_CS1_OUT mmc2_cmd
K7 gpmc_a19
0
0
0
0
0
0
CFG_GPMC_A19_OEN mmc2_dat4
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Timing Requirements and Switching Characteristics 315
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