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DRA722_17 Datasheet, PDF (349/408 Pages) Texas Instruments – Infotainment Applications Processor
www.ti.com
DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
Figure 8-15 show a PCB layout example and the resulting PI analysis results.
PMIC
SMPS2
SMPS2_SW
L1002
1.0uH, 4.5A, 1616
IHLP-1616ABER1R0M11
CORE_VDD
C1014
47uF, 6.3V, X7R, 1210
GCM32ER70J476ME19
SoC
VDD
C363 , 364, 386, 388 ,
390, 498
0.1uF, 16V, X7R, 0402
GCM155R71C104KA55
C 395
0.22uF, 25V, X7R, 0603
GCM188R71E224KA55
C 394
0.47uF, 16V, X7R, 0603
GCM188R71C474KA55
C393
1.0uF, 16V, X7R, 0603
GCM188R71C105KA64
C456
2.2uF, 6.3V, X7R, 0603
GCM188R70J225KE22
Figure 8-15. vdd Simplified SCH Diagram
C487
4.7uF, 16V, X7R, 0805
GCM21BR71C475KA73
NOTE
PCB Etch Resistance Breakdown, PDN Effective Resistance, and vdd routings are UNDER
DEVELOPMENT!
IR Drop: vdd (PCB Rev Oct25, CAD sPSI v13.1.1)
• Source Conditions: 1V @ 1A
• Power Plane/Trace Effective Resistances
– From PMIC SMPS to SoC load = 9.7mohm
– From Power Inductor to SoC load = 6mohm
– "Open-Loop" Voltage/IR Drop for 1A = 6mV
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Applications, Implementation, and Layout 349
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