DRA722_17 Datasheet, PDF (243/408 Pages) Texas Instruments – Infotainment Applications Processor

www.ti.com
DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
Virtual IO Timings Modes must be used to guaranteed some IO timings for GPMC. See Table 7-2 Modes Summary for a list of IO timings requiring
the use of Virtual IO Timings Modes. See Table 7-30 Virtual Functions Mapping for GPMC for a definition of the Virtual modes.
Table 7-30 presents the values for DELAYMODE bitfield.
BALL
N1
H3
L3
L5
E6
M3
H2
R3
N7
T2
L6
H4
M6
N2
F6
M2
J3
T6
L4
F5
T1
G1
P6
N6
R5
U2
J2
Table 7-30. Virtual Functions Mapping for GPMC
BALL NAME
gpmc_advn_al
e
gpmc_ad15
gpmc_ad6
gpmc_ad2
vin2a_d9
gpmc_wen
gpmc_ad14
gpmc_a13
gpmc_a8
gpmc_a14
gpmc_ad4
gpmc_a26
gpmc_ad0
gpmc_wait0
vin2a_d11
gpmc_ad1
gpmc_ad13
gpmc_a2
gpmc_ad5
vin2a_d8
gpmc_cs0
vin2a_hsync0
gpmc_a4
gpmc_ben0
gpmc_a6
gpmc_a15
gpmc_ad11
Delay Mode Value
GPMC_VIRTUAL1
15
13
13
13
9
15
13
15
14
15
13
15
13
15
9
13
13
14
13
9
15
9
14
15
14
15
13
0
gpmc_advn_al
e
gpmc_ad15
gpmc_ad6
gpmc_ad2
gpmc_wen
gpmc_ad14
gpmc_a13
gpmc_a8
gpmc_a14
gpmc_ad4
gpmc_a26
gpmc_ad0
gpmc_wait0
gpmc_ad1
gpmc_ad13
gpmc_a2
gpmc_ad5
gpmc_cs0
gpmc_a4
gpmc_ben0
gpmc_a6
gpmc_a15
gpmc_ad11
1
gpmc_cs6
gpmc_cs4
MUXMODE
2
3
5
gpmc_wait1
gpmc_a2
gpmc_a20
6
gpmc_a23
14⁽¹⁾
gpmc_a25
gpmc_a23
gpmc_a26
gpmc_a27
14⁽¹⁾
Copyright © 2016–2017, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: DRA722 DRA724 DRA725 DRA726
Timing Requirements and Switching Characteristics 243