DRA722_17 Datasheet, PDF (214/408 Pages) Texas Instruments – Infotainment Applications Processor

DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
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SIGNALS
vout2_d9
vout2_d8
vout2_d7
vout2_d6
vout2_d5
vout2_d4
vout2_d3
vout2_d2
vout2_d1
vout2_d0
vout2_vsync
vout2_hsync
vout2_clk
vout2_fld
vout2_de
Table 7-16. VOUT2 IOSETs (continued)
BALL
C3
C4
B2
D6
C5
A3
B3
B4
B5
A4
G6
G1
H7
E1
G2
IOSET1
MUX
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
BALL
A20
E15
D12
C12
F13
E12
J11
G13
J14
B14
F20
E21
B26
F21
C23
IOSET2
MUX
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
NOTE
To configure the desired virtual mode the user must set MODESELECT bit and
DELAYMODE bitfield for each corresponding pad control register.
The pad control registers are presented in Table 4-3 and described in Device TRM, Control
Module Chapter.
Virtual IO Timings Modes must be used to guaranteed some IO timings for VOUT1. See Table 7-2 Modes
Summary for a list of IO timings requiring the use of Virtual IO Timings Modes. See Table 7-17 Virtual
Functions Mapping for VOUT1 for a definition of the Virtual modes.
Table 7-17 presents the values for DELAYMODE bitfield.
BALL
H3
D9
N7
L6
E8
M6
F9
J3
T6
M2
P6
B10
B7
R5
A9
H2
Table 7-17. Virtual Functions Mapping for DSS VOUT1
BALL NAME
gpmc_ad15
vout1_d9
gpmc_a8
gpmc_ad4
vout1_d8
gpmc_ad0
vout1_d5
gpmc_ad13
gpmc_a2
gpmc_ad1
gpmc_a4
vout1_de
vout1_d16
gpmc_a6
vout1_d21
gpmc_ad14
Delay Mode Value
DSS_VIRTUAL1
14
15
15
14
15
14
15
14
15
14
15
15
15
15
15
14
MUXMODE
0
3
vout3_d15
vout1_d9
vout3_hsync
vout3_d4
vout1_d8
vout3_d0
vout1_d5
vout3_d13
vout3_d18
vout3_d1
vout3_d20
vout1_de
vout1_d16
vout3_d22
vout1_d21
vout3_d14
214 Timing Requirements and Switching Characteristics
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