DRA722_17 Datasheet, PDF (363/408 Pages) Texas Instruments – Infotainment Applications Processor

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DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
Device
usb_txp0
usb_txn0
Vias (if necessary)
AC Caps
CMF
Vias (if necessary)
usb_rxp0
usb_rxn0
Vias (if necessary)
CMF
Vias (if necessary)
Place near connector, and keep routing short
SPRS85x_PCB_USB30_1
Figure 8-30. USB 3.0 Interface High Level Schematic
NOTE
ESD components should be on a PCB layer next to a system GND plane layer so the
inductance of the via to GND will be minimal.
If vias are used, place the vias near the AC Caps or CMFs and under the SoC BGA, if
necessary.
Figure 8-31 present placement diagram for USB 3.0 interface.
SoC TX
AC Cap
AC Cap
CMF
SoC RX
CMF
INTERFACE
USB3 PHY
SPRS85x_PCB_USB30_2
Figure 8-31. USB 3.0 placement diagram
Table 8-9. USB1 Component Reference
COMPONENT
ESD
CMF
C
SUPPLIER
TI
Murata
-
PART NUMBER
TPD1E05U06
DLW21SN900HQ2
100nF (typical size: 0201)
Copyright © 2016–2017, Texas Instruments Incorporated
Applications, Implementation, and Layout 363
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