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DRA722_17 Datasheet, PDF (71/408 Pages) Texas Instruments – Infotainment Applications Processor
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DRA722, DRA724, DRA725, DRA726
SPRS956B – MARCH 2016 – REVISED JANUARY 2017
Table 4-2. Ball Characteristics(1) (continued)
BALL NUMBER
[1]
BALL NAME [2]
SIGNAL NAME [3]
MUXMODE
[4]
TYPE [5]
BALL
RESET
STATE [6]
BALL
RESET REL.
STATE [7]
BALL
RESET REL.
MUXMODE
[8]
I/O
VOLTAGE
VALUE [9]
POWER [10]
HYS [11]
BUFFER
TYPE [12]
PULL
UP/DOWN
TYPE [13]
DSIS [14]
C23
xref_clk3
xref_clk3
mcasp2_axr11
0
I
PD
PD
15
1.8/3.3
vddshv3
Yes
Dual Voltage PU/PD
1
IO
LVCMOS
0
mcasp1_axr7
2
IO
0
mcasp4_ahclkx
3
O
mcasp8_ahclkx
4
O
atl_clk3
5
O
vout2_de
6
O
hdq0
7
IO
1
vin2a_de0
vin1a_de0
8
I
clkout3
9
O
timer16
10
IO
gpio6_20
14
IO
Driver off
15
I
(1) NA in this table stands for Not Applicable.
(2) For more information on recommended operating conditions, see Table 5-4, Recommended Operating Conditions.
(3) The pullup or pulldown block strength is equal to: minimum = 50 μA, typical = 100 μA, maximum = 250 μA.
(4) The output impedance settings of this IO cell are programmable; by default, the value is DS[1:0] = 10, this means 40 Ω. For more information on DS[1:0] register configuration, see the
Device TRM.
(5) IO drive strength for usb1_dp, usb1_dm, usb2_dp and usb2_dm: minimum 18.3 mA, maximum 89 mA (for a power supply vdda33v_usb1 and vdda33v_usb2 = 3.46 V).
(6) Minimum PU = 900 Ω, maximum PU = 3.090 kΩ and minimum PD = 14.25 kΩ, maximum PD = 24.8 kΩ.
For more information, see chapter 7 of the USB2.0 specification, in particular section Signaling / Device Speed Identification.
(7) This function will not be supported on some pin-compatible roadmap devices. Pin compatibility can be maintained in the future by not using these GPIO signals.
(8) In PUx / PDy, x and y = 60 to 200 μA.
The output impedance settings (or drive strengths) of this IO are programmable (34 Ω, 40 Ω, 48 Ω, 60 Ω, 80 Ω) depending on the values of the I[2:0] registers.
4.3 Multiplexing Characteristics
Table 4-3 describes the device multiplexing (no characteristics are available in this table).
NOTE
This table doesn't take into account subsystem multiplexing signals. Subsystem multiplexing signals are described in Section 4.4, Signal
Descriptions.
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Terminal Configuration and Functions
71